A High-Level Approach for Energy Efficiency Improvement of FPGAs by
Voltage Trimming
- Mehdi Safarpour ,
- Lei Xun ,
- Geoff V. Merrett ,
- Olli Silven
Abstract
This paper proposes a solution that makes voltage scaling possible by
simply using HLS tools provided by vendor to improve energy efficiency
of FPGAs by 2xOct 2022Published in IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems volume 41 issue 10 on pages 3548-3552. 10.1109/TCAD.2021.3127153 
