Abstract

Physically Unclonable Function (PUF) is an emerging hardware security primitive that provides a promising solution for lightweight security. PUFs can be used to generate a secret key that depends on the random manufacturing process variation of the device for lightweight authentication and device identification. This work proposes an optimized version of the Configurable Ring Oscillator (CRO) PUF that aims to reduce power consumption and area overhead. The proposed design eliminates the duplication of ROs, reduces the switching activity, and introduces the inter-stage delay as an additional source of randomness. The proposed PUF has been implemented in 22nm FDSOI technology using the Synopsys tools. A comprehensive security analysis has been acquired utilizing Challenge-Response Pairs collected from 8 chips. Results show an average of 49.42%, 38.25%, 9.95%, and 45.5% for uniformity, diffuseness, reliability, and uniqueness, respectively. Compared with the state-of-the-art, the proposed design achieves an area and power reduction of 75% and 65.1%, respectively. With the proposed PUF delivering 10 32 CRPs, it is classified as a strong PUF. Additionally, the proposed design passes NIST tests and achieves an average prediction accuracy of 67.1% of machine learning modeling.