Physically unclonable functions (PUFs) are circuit primitives that offer a promising and cost-effective solution for various security applications, such as integrated circuits (IC) counterfeiting, secret key generation, and lightweight authentication. PUFs leverage semiconducting variations of ICs to extract intrinsic responses based on applied challenges, establishing unique challenge-response pairs (CRPs) for each device. The security analysis of PUFs is crucial to identify the device weaknesses and ensure response integrity. Accordingly, CRP-based examination plays a major role in defining the resistivity of the block against general and modeling-based attacks. Such analysis requires an updated and representative dataset for training and evaluation. However, there is a lack of benchmark datasets for assessing the effectiveness and resistance of PUF devices. Motivated by this, in this work, a comprehensive dataset from two different architectures a digital-based PUF implemented on a field programmable gate array (FPGA). The dataset involves responses from FPGAs with the maximum number of collected CRPs reaching 300K records. The dataset provides a significant number of CRPs for a multi-bit response, where the spatial and temporal adjacency are implicitly defined in the extracted CRPs. Moreover, we investigate different approaches utilizing the generated dataset such as machine learning-based modeling, correlation analysis, and entropy analysis. The  CRPs are employed to train linear and nonlinear Support Vector Machine (SVM) models, and the prediction accuracy of SVM models is used as an indicator of the PUF's vulnerability to modeling attacks. As the prediction accuracy does not exceed 65% over 10K CRPs, the extracted dataset sufficiently verifies the resiliency of the device against ML-based modeling attacks. Additionally, Pearson's coefficient is computed on a 10K-bit vector to determine the correlation between the bits of the response. The calculations expose some correlations between \(\pm\)0.25, which warns of potential threads. Finally, the paper discusses some potential future research directions and challenges that are envisioned to enhance the security performance of PUFs.