A Lossy Integrator with Active Bias Point

 Abstract —The charge-generating sensors are widely used in many applications in consumer, automotive and medical electronics. The sensor output generates a charge proportional to the applied input quantity: pressure, acceleration, strain, light, etc. Usually, charge amplifiers are used to register such signals. The charge amplifier is an integrator that integrates the input current over time. In continuous-time signal processing, a parallel resistor is used to dissipate the energy stored on the integration capacitor, and such self-zeroed integrator circuits are known as lossy integrators. To achieve low-frequency operation, when a capacitor is in the pico-farad range, a very high-ohmic resistor, in the range of giga-ohms, must be used. Such a high-ohmic resistor increases the output offset voltage to an unacceptable level. To overcome the output offset problems, a composite charge amplifier with active feedback has been introduced. This paper presents a simplified lossy integrator circuit which uses only one opamp in the feedback. The presented circuit can be easily adapted to the needed cut-off frequency and gain. It is validated by practical measurements and can benefit many applications where charge-to-voltage conversion is needed.

In other words, it is an integrator and integrates the input current over time, thus converts the captured charge into an output voltage. To return the integration capacitor C f to its E. Alnasser is with NouTronics Research and Development group (founder), Abadan, Iran (corresponding author e-mail: ealnasser@noutronics.com). D. P. Dobrev is with Institute of Biophysics and Biomedical Engineering at the Bulgarian Academy of Sciences, Sofia, Bulgaria (e-mail: dobri@biomed.bas.bg).
T. D. Neycheva is with Institute of Biophysics and Biomedical Engineering at the Bulgarian Academy of Sciences, Sofia, Bulgaria (e-mail: tatiana@biomed.bas.bg). initial zeroed state, the stored energy must be dissipated. In continuous-time signal processing a parallel resistor, R f is used for this purpose, and such self-zeroed integrator circuits are called lossy integrators, see Fig. 1 (a). The transfer impedance Z LI of a conventional lossy integrator (LI), shown in Fig. 1 (a), is: The resistor R f provides also a path for the input bias current of the opamp inverting input and is essential for the normal operation of the circuit. The worst-case output offset voltage V LIoo of the circuit from Fig. 1 (a) is given by (3).
where I b and V io are the input bias current and the input offset voltage of the used opamp. The output offset voltage V LIoo increases by increasing the value of R f . To achieve lowfrequency operation, when the capacitor C f is in a pico-farad range, a very high-ohmic feedback resistor R f , in the range of giga-ohms and even tera-ohms, must be used, therefore the output offset voltage of the circuit becomes very large [2]. Implementing a voltage divider in the feedback path by a "T" resistive network, as shown in Fig. 1 (b), multiplies the voltage over the resistor R f . Let's denote the reciprocal value of the resistor divider gain from Fig. 1 When R f >>R b >>R a , the transfer impedance and the output offset of the circuit from Fig. 1 (b) become: It can be seen that together with R f , the V io is also multiplied by the coefficient k. To reduce the offset component due to the input current I b , JFET or CMOS opamps are usually used [2,[21][22]. In spite of that, when R f is very large, the currents of the input ESD protection and their temperature drift, generate an output offset voltage that is inadmissible in many precision applications [21]. In these applications, the use of costly electrometer opamps, manufactured without ESD protections and soldered with special measures against ESD events, is a well-known solution to overcome this problem.
To reduce the output offset voltage without violating the noise performance of the circuit, a composite charge amplifier has been introduced [22]. It uses active feedback to eliminate the output offset voltage. This paper presents a simplified lossy integrator circuit with only one opamp in the feedback. It is fully equivalent to the published version with three opamps. The circuit is analyzed in detail, and general guidelines for design and optimal component selection are given. The circuit is prototyped, and its operation is validated by the shown experimental results.

II. OPERATING PRINCIPLE
The main idea to cancel the integrator output offset voltage is to build a composite amplifier with active negative feedback. With the help of additional opamps, placed in the feedback, the output offset can be translated to another node in the circuit, where the offset voltage is not critical. The idea is to replace the feedback resistor R f with an active circuit, as shown in the block diagram in Fig. 2   The active feedback must transfer the low-frequency changes at the opamp output to its inverting input. It must close the negative feedback and must define the bias point at the opamp inverting input to be a virtual ground. The active feedback should exhibit high impedance for the bandwidth of interest, i.e. its action should be disconnected at the higher frequencies. In other words, the active feedback must imitate a very large inductor. A composite LI circuit with such active feedback has been introduced in [22]. Its schematic is shown in Fig. 2 (b). It achieves very low output offset voltage without using costly electrometer opamps and only by using generalpurpose JFET opamps. However, its disadvantage is that the circuit uses two opamps in the feedback path. The simplified LI circuit with one opamp in the feedback is shown in Fig. 2 (c). By the U 2 action, the output offset is controlled and is eliminated from the circuit output.

A. DC Analysis
The output offset voltage of the circuit from Fig. 2 (c) is determined by the opamp U 2 . From DC point of view, the negative feedback around the main amplifier U 1 is provided by the opamp U 2 , therefore the circuit has a stable and welldefined bias point. A simple and straight forward DC analysis shows that the worst-case output offset voltage V oo1 of the circuit is given by the following equation: where I + b2 and I -b2 are the input currents of non-inverting and inverting inputs of the U 2 respectively, and V io2 is the input offset voltage of the opamp U 2 . It is worthy to mention equation (7) has been obtained by assuming that the opamps have large DC open-loop gain which is a reasonable assumption. According to this assumption, both inverting and non-inverting inputs of U 2 have the same potential. Anyway, as it can be deduced from (7) the output offset voltage is very low in comparison with (3) and (5) because the value of resistor R i is very smaller than that of the product kR f or R f .
By assuming R f >>R b >>R a , the worst-case DC potential at node V F can be expressed by the equation (8): Here I -b1 and V io1 are the input current of the inverting-input and input offset voltage of the opamp U 1 respectively, k is the coefficient already defined in (4).

B. AC Analysis
The AC analysis has been performed by using the equivalent signal-flow-graph diagram (SFG) which is valid for both circuits shown in Fig. 2 (b) and Fig. 2 (c). The equivalent SFG diagram is shown in Fig. 3. The opamp inverting input is a summing node that sums the input current I in and the feedback current I  . The forward gain is given by (1). As is shown in Fig. 3, it is defined by the integration capacitor C f . The feedback gain β(s) is a transconductance, and is expressed by the equation (9): The coefficient k in (9) has been discussed. For the circuits in Fig. 2 (b) and Fig. 2 (c) it is defined as follows: The loop gain is responsible for the stability of each control system with negative feedback. It must be evaluated, and when the loop gain becomes unity or 0dB, the accumulated phase lag must be lower than 135, i.e. the worst-case phase margin of the closed-loop system must be higher than 45, preferably higher than 65.The open-loop gain T OL (s) is: Equation (11) represents a chain of two cascaded integrators and a first-order low-pass filter. It is a third pole transfer function, and to have a stable closed-loop response, it must be compensated to intersect the 0dB axis with approximately -20dB/dec roll-off. This is possible only when the low-pass filter does not introduce a large phase lag, i.e. its pole must be placed to influence on higher frequencies, far away from 0dB crossover frequency. Because the two integrators have -40dB/dec roll-off, one of them should be compensated by an appropriate selected zero. Equation (11) has four time constants, defining four corner frequencies. The time constant τ f , determines f f , the unity-gain-frequency (UGF) of the main integrator, see (12).
The time constant τ i , determines f i , the UGF of the feedback integrator, see (13).
The time constant τ b determines the cutoff frequency f b of the low-pass filter, see (14).
And the time constant τ z determines the zero frequency f z : The crossover frequency f c , where T OL =1, can be calculated by the following simple steps. Let's assume initially that the τ z and τ b are zero. The equivalent UGF of the two cascaded integrators f u is in a geometric mean with f f and f i : If the zero frequency f z is selected to be n times lower than f u : The crossover frequency f c is: The phase margin is: From equation (19) when n=2, the phase margin is about 76. The -3dB high-pass cutoff frequency f 3dB of the closedloop response depends on the selected phase margin and for this example it is approximately: To not reduce significantly the phase margin the low-pass cutoff frequency f b should be selected to be f b >>f c , let say it should be more than one decade higher.
An example of a practical procedure for proper component selection can be given as follows: -select C f for a needed closed loop-gain -select starting values for R f and k -check by (8) (17) and (15) calculate f z , τ z and R d -from (18) and (20) calculate f c and f 3dB -select f b =100f c and from (14) calculate C 1 -simulate T OL (s) by (11) and check f c , and  m -make interactions and repeat some of the above steps if needed For completeness, the closed-loop transimpedance gain is: In eq. (21) Z(s) and T OL (s) should be replaced by (1) and (11). For higher frequencies T OL (s)0, thus T CL (s)Z(s).

A. Open-loop Gain
PSpice simulation of the magnitude and phase of the openloop gain T OL (s), given by equation (11), is shown in Fig. 4. The used component values are: C f =200pF, R f =20M, C i =4.7uF, R i =3M, R d =510k, R a =10k, R b =240k, C 1 =470n. The simulation proves the described procedure for component selection. The simulated f c =0.277Hz, and the phase margin is  m =76.1. When the circuit operates as an AC amplifier, the high-pass cutoff frequency f 3dB of the closedloop response, can be calculated by (20) and is f 3dB 0.2Hz.

B. Frequency Response
Frequency responses of two AC amplifiers, built with an active-biased integrator (ABI) circuit from Fig. 2 (c), and a conventional LI (CLI) circuit from Fig. 1 (a), are compared by PSpice simulations. To perform the simulation, an ACamplifier, shown in Fig. 5, is implemented by using both an ABI and a conventional CLI circuits. It should be mentioned that the transfer functions of AC amplifiers implemented by ABI and CLI circuits are given by equations (22) and (23), respectively. where T CL (s) and Z LI (s) are the closed-loop transimpedance gain given by (21) and (2). By assuming C S =2nF and the component values from the previous section for the ABI circuit from Fig. 2 (c), or C S =2nF and R f =4GΩ for CLI circuit from Fig. 1 (a), two AC amplifiers can be arranged to have -3dB high-pass cutoff frequency f 3dB 0.2Hz, and 20dB amplification in the pass-band. The circuits are simulated by using general-purpose JFET opamps TL072, supplied by bipolar 15V DC voltage source. The results of the simulations are shown in Fig. 6. According to Fig. 6, it is obvious that the ABI circuit exhibits -40dB/dec high-pass roll-off, while the CLI yields only -20dB/dec. This is an important advantage for the ABI circuit.

C. Noise Performance
The ABI circuit has three bigger noise contributors. They are the noise of opamp U 1 , the noise of the high-omic resistor R f and the noise of opamp U 2 . Each of them influences different bandwidths. The simulated nose gains are shown in Fig, 7. The U 2 noise is directly transferred to the output for low frequencies and DC. The noise gain of U 1 has peaking around the cutoff frequency. For higher frequencies, it is determined by the ratio of the capacitors C s /C f . The resistor R f influences around the cutoff frequency. For low frequencies, its noise is canceled by U 2 , for higher frequencies by C f .  The integrated output noise for ABI and CLI amplifiers is shown in Fig. 8. When k>0 the integrated output noise of the ABI amplifier is slightly higher.

D. Transient Behavior
The transient behavior of the ABI circuit is simulated with the circuit of a current-to-voltage converter, shown in Fig. 9. The ABI circuit was driven by a rectangular voltage with 2V peak-to-peak amplitude and 955.22Hz frequency. The value of the input resistor R s is 8.2MΩ. The simulated output voltage is shown in Fig. 10. It is a triangular waveform with 319mV peak-to-peak amplitude. For opamp V io =3mV, the simulated output offset voltage is V oo =3.011mV.

A. Frequency Response
The ABI circuit has been tested experimentally in order to validate the theoretical formulas and the circuit itself. The circuit is implemented by using the component values which are described in the first item of the previous section. The TL072 opamp is used to assemble the circuit. It should be noted that the circuit is assembled on a Phenolic perforated prototype board. The frequency response is measured by the circuit shown in Fig. 5. The ABI circuit was tested by sinusoidal signals with various frequencies. The measured frequency response is shown in Fig. 11. It is appended to the simulated one. The obtained results show a good agreement between experiment, theoretical analysis and PSpice simulation. It should be noted that the gain-bandwidth product of opamp TL072 is specified to 4MHz, according to the opamp datasheet.

B. Noise Performance
To evaluate the noise performance of the circuit, the noise floor of a grounded oscilloscope is compared with the observed noise at the ABI output, see The noise floor of the oscilloscope is V osc =1.12mV pp . The measured noise at the ABI output is V m =1.28mV pp . The ABI peak-to-peak noise V n can be roughly calculated by rootmean-square fashion, shown by (25): Replacing the measured values for V osc and V m in (25), it can be calculated that the ABI noise is V n =0.62mV pp . Using a factor 6.6 sigma for peak-to-peak to rms noise conversion, it can be calculated that the ABI rms noise is V n =94µV rms .

C. Transient Behavior
The ABI circuit has been tested by a rectangular signal generated by a function generator which is connected to the input of the circuit via 8.2M resistor, as is shown in Fig. 9. The input is square wave signal with 2V peak-to-peak amplitude and about 1kHz frequency. The applied input signal and the measured output voltage are shown in Fig. 13. According to equation (24), the peak-to-peak value of the output voltage should be equal to 319mV which completely corresponds to the 320mV, obtained experimentally.
The measured output DC offset voltage of the ABI circuit is -6.5mV, while the DC offset voltage at the node V F is equal to 154mV.

VI. CONCLUSION
Achieving low-frequency operation with conventional lossy integrators is difficult task because very high-ohmic resistors should be used. The needed resistors often are in the giga-ohm range, thus the used opamps should have very low input currents. To reduce the output offset voltage error requires the usage of special electrometer opamps with input currents in a femto-ampere range. These opamps are expensive and require special care in their implementation. From another side the high-ohmic resistors are not stable over time and lead to drift in the important circuit parameters and characteristics [4]. The presented ABI circuit overcomes all of these problems. It is built from on the shelf components and cancels the output offset voltage with popular general-purpose JFET or CMOS opamps. The proposed circuit is completely equivalent to the published version using three opamps [22]. Both circuits have the same frequency response, as their transfer functions are identical. The consequence is that the circuit with two opamps in the feedback could be successfully replaced by the new circuit which uses only one opamp in the feedback path. The following advantages of the presented circuit should be pointed out: -it is a simple and cost-effective solution utilizing only two general-purpose opamps -the circuit is made from a small number of popular components; very high-ohmic resistors or special opamps are not needed -acceptable low output offset voltage is achieved -very low and well-defined high-pass cutoff frequency -second-order high-pass roll-off -stable transient behavior -can benefit many applications where charge-to-voltage conversion is needed