A Robust-Synchronization-Loop for Grid-Connected Distributed Generation Converters

In this paper, a novel Robust-Synchronization-Loop (RSL) is proposed to track the phase and frequency of the grid voltage. The method can be widely applied to the grid-connec ted converters in integration of distributed generations (DGs). The detailed analytical model and the parameter tuning based ona small-signal model of the RSL are presented. It is shown that the eigenvalues associated with the RSL remain always on the left half-plane, thus, it provides better stability property with the grid-connected DG converters. In order to show the effectiv eness of the proposed RSL, simulation results are provided for diferent scenarios of the grid condition such as voltage and frequenc y disturbance, unbalance grid condition and grid faults. Theresults show that the proposed method effectively tracks the phase a nd frequency of the grid voltage and maintains the good synchro nism of the DG converters during these different small and large disturbances in the power system.


I. INTRODUCTION
T HE application of power electronics converters in the modern power systems is increasingly used, from renewable energy such as wind and solar power integration [1]- [4], in the high voltage dc (HVDC) transmission system to the flexible ac transmission system (FACTS) [5]- [8]. Different control strategies such as the standard vector control, model predictive control, adaptive control, sliding mode control can be adopted to regulate the power electronics converters [9]- [12]. Regardless of the control strategy employed in the converters, a synchronization unit is required in the controller in order to synchronize the terminal voltage of the converters to the grid before connecting them to the grid [13]- [16]. The synchronization enables the converters to connect effectively to the grid without a harmful transient overcurrent during the connection. The synchronization unit must provide accurate real-time phase information of the power grid for the robust synchronization of these power electronics converters.
The synchronization is usually accomplished by detecting the phase of the grid voltage using a phase-locked-loop (PLL) [17]- [19]. The PLLs present a proper performance under a balance voltage condition and a strong grid condition, however, PLLs are inherently non-linear and it is very difficult and time-consuming tuning the PLLs to achieve satisfactory performance. Moreover, the performance of PLLs degrades significantly under an unbalanced and distorted condition of the grid voltage, load unbalances, as well as measurement scaling error and dc offset, produces periodic disturbances.
Dr. Amin is an Associate Professor with the Department of Electric Power Engineering at Norwegian University of Science Technology, Trondheim-7491, Norway. Email: mohammad.amin@ntnu.no PLLs are very sensitive to a sudden change of phase of the voltage, even sometimes, it introduces an instability problem to grid-connected converters [20], [21]. Frequency-locked-loop (FLL) is often used for the synchronization of grid-connected converters [22]. However, the quality factor of an FLL is sensitive to the grid frequency fluctuation and suffers from phase lock error when the power network has a dc offset. Moreover, the FLL brings a computational complexity in tuning the parameters and is difficult in hardware realization.
The power exchange between the grid and the converters can be used to realize the synchronization mechanism of a gridconnected converter which utilizes the internal synchronization mechanism of an ac system in a similar way as the operation of a synchronous generator (SG) [23]- [25]. An example of such a power-synchronization-loop (PSL) mechanism is presented in [25] where the phase angle and voltage magnitude are used to regulate the active power and reactive power. A PLL is no longer required during normal operation of the grid-connected converter, however, this control cannot be applied in some situations of the grid and converters, and a backup PLL is required to tackle those situations. For example, the PSL can not be applied when the converter is in blocked stage. It needs a PLL to provide the initial synchronization signal to the converter controller before connection. Another example is during a severe ac-system fault. The control system switches to the backup PLL to limit the current flowing into the converter semiconductor devices. This adds complexity to the overall control system and will impact its stability.
Knowing the limitation of a PLL, several researches have been conducted to develop the control for grid-connected DG converters that can operate without a PLL [26]- [28]. One approach of such control for DG converters is known as Synchronverter [26] where a dedicated synchronization unit like PLL, FLL is no longer required for synchronization of the converters. Another example of such control known as the selfsynchronized universal droop controller is presented in [27] for grid-connected converters which also does not require a PLL. Those controllers mimic the synchronization mechanism of an SG. These converter controllers provide the grid support functionality by contributing to frequency and voltage regulation. The performance of these controllers is very satisfactory during a normal operation of the grid. The main concern of these controllers is the limited capability of regulating current during faults as similar to the PSL mechanism discussed previously [29]. These controllers do not have an internal current control-loop, thus, it requires a sophisticated protection system to save the converter's semiconductor devices during the faults.
This paper presents a new phase-tracking-loop, so-called Robust-Synchronization-Loop (RSL) for the grid-connected DG converters, as an alternative to a normal PLL, to track the phase and frequency of the grid voltage. The output frequency and voltage magnitude of the RSL can be used in the standard control of the converter. The grid voltage and frequency support functionality with the standard control of the converter can also be achieved by implementing appropriate droop characteristics [30], however, such implementation is beyond the scope of this paper and have not been discussed. Analytical modeling, as well as a method for tuning the parameters, are presented. It is highlighted that the tuning of the proposed RSL is very simple. The eigenvalues associated with the RSL are found to be λ 1,2 = − R L ± jω s , which indicates that the RSL will always be stable itself since the term − R L is always negative and remains always in the left half-plane. It provides better stability property with the grid-connected DG converters. The RSL can be applied both when the converter is in blocked stage to provide the synchronization signal to the converter before connection as well as during a severe ac-system fault. Finally, simulation results are provided to show the effectiveness of the proposed method for different scenarios of the grid condition such as voltage and frequency disturbance, unbalance grid and grid fault. The result shows that the proposed method effectively tracks the phase and frequency of the grid voltage and maintains the synchronism of the converters during different small and large disturbances.
The rest of the paper is organized in the following. Section II presents the development of the proposed RSL synchronization mechanism. Section III presents the small-signal model development as well as the parameters tuning of the RSL. The frequency-domain analysis of the RSL based on the transfer function is discussed in this section. The effectiveness of the proposed RSL with a grid-connected converter is presented in Section IV. Finally, this paper is concluded in Section V.
II. THE PROPOSED ROBUST-SYNCHRONIZATION-LOOP Before turning on PWM of the converter, the inverter voltage must be synchronized with the point of common coupling (PCC) voltage v o of the grid. The RSL is used to serve that purpose. The RSL tracks the Phase information of the PCC voltage by generating a voltage e which is synchronized such that e = v o . Initially, it is assumed that the RSL voltage is not synchronized, thus, the magnitude and phase of e is not the same as v o . The voltage error between v o and e can be given where the bold font is used represent the voltage in matrix form for the three-phase system as e = [ e a e b e c ] T and Under such condition, if a virtual impedance is introduced in between the RSL and the PCC voltage in the microcontroller, a virtual current i v flows through this virtual impedance due to this voltage error. The virtual current can be given by  Fig. 1. A simplified circuit diagram for power flow calculation due to the virtual impedance. current, a virtual active power and reactive power flow between the RSL and the PCC as shown in Fig. 1. The virtual active power and reactive power can be calculated as Thus, the virtual real power and reactive power can be given by where E and V o are the RMS value of the estimated voltage of the RSL and the PCC, respectively, and θ e and θ o are their corresponding phase angle, Z v and θ v is the magnitude and angle of the virtual impedance. The purpose of implementing the RSL is to estimate the phase of the PCC voltage in order to synchronize the converter voltage to the grid. The synchronization is achieved when the estimated RSL voltage e becomes equal to the PCC voltage v o , i.e., The active power and the reactive power in (4) becomes zero, regardless of the virtual impedance type when E = V o and θ e = θ o , i.e., when the synchronization is achieved. Hence, the synchronization can be achieved by regulating the active power and the reactive to zero. The virtual impedance can be selected to be dominantly inductive which gives θ v ≈ π/2. Thus, the active power and reactive power resulting from the virtual current can be given by where δ = (θ e − θ o ).
The active power and reactive power in (6) give a positive correlation between the active power with the frequency and the reactive power with the voltage which can be given by The frequency of the PCC voltage can be expressed as where ω s is the system fundamental frequency and ∆ω s is the frequency deviation from the fundamental frequency due to disturbances. The frequency deviation can be estimated as where k ω is a positive gain or droop gain. The frequency of the RSL estimated voltage can be expressed as where ∆ω e is the RSL estimated error. The phase difference between the PCC and the RSL voltages can be expressed by An integral controller is introduced to compensate this phase error in the estimated voltage by regulating the active power as Hence, the estimated frequency of the RSL can be written by When the synchronization is achieved, δ becomes zero. It can be achieved by setting the reference power to 0 in (12). Thus, the estimated frequency and the phase of the RSL can be given by by where k p = k ω + k pe . Another condition in (5) for achieving the synchronization is having the equal magnitude of the estimated RSL voltage and the PCC voltage which can be achieved by setting where V o is available in the microcontroller through voltage transducer.
The modeling of the RSL will be presented in a synchronous reference frame (SRF). The transformation of the three-phase quantity from the stationary reference frame to the SRF is based on the amplitude-invariant Park transformation, with the d−axis aligned with the voltage vector v o and q−axis leading the d−axis by 90 o . Hence, the magnitude of the d− and q−axis voltage is given by Thus, the estimated voltage of the RSL used to generate the virtual current in (2) can be given in the stationary reference frame by where The virtual current is given in (2) can be obtained in the dq−frame as Since the q-axis component of estimated voltage is directly set to zero, the virtual active power can be given by Hence the RSL is proposed as The proposed RSL is shown in Fig. 2. As shown in Fig. 2, the virtual impedance structure forms into a virtual admittance structure. The virtual admittance structure emulates the output impedance without leading to the difficulties in hardware implementation [31].

III. SMALL-SIGNAL MODEL AND PARAMETER TUNING OF THE RSL
The RSL shown in Fig. 2 has mainly three parameters, L, R and k p that need to be tuned for achieving the desired performance. The open-loop transfer function can be used to obtain these parameters. For that purpose, an equivalent model of the RSL is derived. The dynamic equation of the virtual current can be given in the dq−frame as Hence, the equivalent model of the RSL in dq−frame is shown in Fig. 3. The dynamic performance of the RSL can now be described by (22)- (25) which is presented in the state-space form through a 3rd order non-linear model as  where x(t) is the state vector and u(t) is the input vector. The non-linearity of the model prevents the direct application of classical linear analysis techniques. Therefore, a small-signal representation is derived for a steady-state operating point as given by where, for example, A = ∆ x f and ∆ x f denotes the Jacobean matrix of f with respect to x. The A-matrix can be given by where the capital letters for the voltage and currents are used to represent the steady-state value of the voltage and currents. At steady-state, the RSL drives the current to zero, i.e., I d = 0, I q = 0. Hence, the eigenvalues of the A−matrix can be calculated as λ 1,2 = − R L ± jω s , λ 3 = 0. The eigenvalues indicate that the RSL will always be stable since the term − R L is always negative. If the cross-couplings are neglected andω s is assumed as the disturbance, the open-loop gain transfer function of the RSL can be given by Eqn (30) indicates that a higher value of the virtual impedance increases the stability margin, on the other hand, it decreases the response time. A higher value of k p , increases response time and decreases the stability margin. Therefore, the selection of the virtual impedance and k p is a trade-off between the response time and the stability of the synchronization loop. The magnitude of the open-loop gain of (30) at the crossover frequency ω c is unity. Thus, according to (30), we can write According to (31), k p can be calculated as The value of the virtual inductor and resistor can be chosen based on the converter parameters. An example of the control tuning is presented where L and R is selected 40 % of the converter inductance and resistance. The parameter of the system is given in Table I. The crossover over frequency is set to 2 rad/s. The resulting frequency response of the transfer function is shown in Fig. 5. As can be seen, the transfer function has a sufficient phase margin, which ensures the robustness and the stability of the synchronization-loop. This value will be used in the next section to verify the effectiveness of the proposed method.

GRID-CONNECTED CONVERTER
In order to verify the effectiveness of the proposed RSL, it has been tested for different scenarios of the grid conditions. The converter is shown in Fig. 4 and the parameters of the system are given in Table I. The dc-side of the converter is connected to a dc source which can be used to emulate a renewable energy source or battery energy storage. The widely used standard vector control is adopted to control the converter which has an inner-loop PI current control and the outer-loop PI power control. The converter system has been implemented in MATLAB/Simulink association with the SimPower blockset with a detailed switching model of the converter and a sampling frequency of 10 kHz.
Simulation has been carried out in different scenarios of the grid condition. The first simulation results are presented in Fig. 6. The simulation is started at t = 0 s. The trackingloop of the RSL is activated at t = 0.1 s and the PWM of the inverter is enabled at t = 0.5 s. The tracking-loop of the RSL can be activated at t = 0 s, however, in this simulation, it is activated at t = 0.1 s to show the initial phase difference between e and v o . A zoom view of the synchronization process is shown in Fig. 7. The top plot of Fig. 7 shows the phase-A voltage of the PCC, v oa and RSL, e a ; the middle plot shows the difference between these two voltages, i.e., v err = e a −v oa and the bottom plot shows the phase difference δ = θ e − θ o of these two voltages. As shown in Fig. 7, it has a phase difference between the RSL and PCC voltage is around 50 o and a voltage difference with a peak value around 190 V due to this phase difference. The tracking-loop of the RSL is activated at t = 0.1 s to start the synchronization. Within a few cycles, the RSL voltage is synchronized with the grid. The RSL is able to track the phase of the grid voltage and the phase difference δ becomes zero. Since the RSL tracks the phase of the grid voltage, the PWM of the converter can be enabled any time to turn on the converter for grid connection. As can be seen in Fig. 6, the PWM is enabled at 0.5 s. Since the RSL tracks the phase of the grid voltage and it is synchronized, the grid connection is very smooth and there is no transient over current. Fig. 6(b) shows the output active power and the reactive power of the converter. When the PWM is turned on, the active power and reactive power is set to 0 kW and 0 kVar. At t = 1 s, the active power is set to 15 kW with a ramp rate of 15 kW/s and at 3 s, the active power is set to 10 kW. As can be seen, the converter follows the reference very smoothly. Fig. 6(c) shows the d− and q−axis PCC voltage and converter current. Before enabling the RSL, the d− and q−axis voltage are not a pure dc component, however, when the RSL is synchronized and tracks the phase of the grid voltage, the d− and q−axis voltage becomes a pure dc component where the d−axis voltage has a magnitude with peak value of the phase voltage and the magnitude of the q−axis voltage is zero as it is set e q = 0 in (23). The d− and q−axis current component are also pure dc components as expected.
The performance of the RSL is tested for a change of the grid frequency and the result is presented in Fig. 8. The top plot of Fig. 8 shows the grid frequency and the estimated frequency by the RSL. When the RSL is enabled at 0.1 s to track the phase of the PCC voltage, there is a transient frequency change, however, the RSL tracks the phase and frequency of the PCC voltage when the synchronization is achieved. A frequency disturbance is introduced in the grid at 2.5 s. The frequency of the grid is reduced to 49.5 Hz and  recovered to 50 Hz at 3 s. As shown in the top plot of Fig. 8, the RSL accurately tracks the frequency of the PCC voltage. The active power and the reactive power of the converter are also shown in Fig. 8    not have any significant impact on its operation. The converter controller can be realized to support the grid frequency during those disturbances, however, that operation is beyond the scope of this paper. The next simulation has been carried out for a case of unbalance grid voltage and the simulation result is shown in Figs. 9 and 10. An unbalance grid is created by injecting 5% of the negative sequence voltage component purposely at 2.5 s. The instantaneous value of the unbalance grid voltage is shown in Fig. 9. The controller regulates the active power, therefore, the converter current becomes unbalanced and distorted. The active power and reactive power are shown in Fig. 10(a). The converter regulates the power smoothly during this unbalance grid condition, however, the reactive power oscillates with a frequency twice the fundamental with a magnitude of 1.2 kVar. Since no negative sequence current controller is implemented in the control part, it is likely to have such oscillation. The voltage error v err and phase error δ are shown 10(b). The phase error is around 0.5 o peak value for this unbalanced grid condition. There is also an instantaneous voltage error resulting from this phase error. The phase difference is insignificant and does not have any significant impact on the steady-state operation of the converter.
The performance of the RSL has been tested for a grid voltage dip and the simulation result is shown in Fig. 11. A 50% grid voltage drop is forced due to a fault in the grid at 2.6 s as shown in Fig. 11(a). Since the controller has an inner-loop current controller, the current is limited according to the maximum limit during the fault. The active power and reactive power of the converter is shown in Fig. 11(b). The output active power of the converter is reduced significantly during the fault, while the reactive power is maintained to its setting. The voltage error and phase error during this grid fault are also presented in Fig. 12. As can be seen, there is a small phase error around 13 o peak value in the transient period, which is eventually driven towards zero in steady-state. There is also an instantaneous voltage error which is resulting from this transient phase difference. The grid fault is cleared at 3.0 s. As shown in Fig. 12, the phase is returning to zero in steady-state and the RSL has not lost synchronization during this large disturbance.

V. CONCLUSION
This paper presents a robust-synchronization-loop for the grid-connected DG converters to track the phase and frequency of the grid voltage. Analytical modeling, as well as a method for tuning of the parameters, are presented. It is shown that the tuning of the proposed RSL is very simple. The eigenvalue associated with the RSL is λ 1,2 = − R L ± jω s , which indicates that the RSL will always be stable itself since the term − R L is always negative and remains always in the left half-plane. It provides good stability property with the grid-connected DG converters. Simulation results are provided to show the effectiveness of the proposed method for different scenarios of the grid condition such as voltage and frequency disturbance, unbalance grid and grid fault. The result shows that the proposed method effectively tracks the phase and frequency of the grid voltage and maintains the synchronism of the converters during different small and large disturbances.