A Comprehensive Framework for the Thévenin–Norton Theorem Using Homogeneous Circuit Models

The homogeneous description of a linear, uncoupled circuit is based on the assignment to each device of a triad <inline-formula> <tex-math notation="LaTeX">$(p: q: s)$ </tex-math></inline-formula>, where the parameters are defined up to a nonzero multiplicative constant and characterize a voltage-current relation of the form <inline-formula> <tex-math notation="LaTeX">$pv-qi=s$ </tex-math></inline-formula>. Given a one-port, the open-circuit and short-circuit network determinants, to be denoted as <inline-formula> <tex-math notation="LaTeX">$p_{e}$ </tex-math></inline-formula> and <inline-formula> <tex-math notation="LaTeX">$q_{e}$ </tex-math></inline-formula>, are polynomial functions of the <inline-formula> <tex-math notation="LaTeX">$p$ </tex-math></inline-formula>- and <inline-formula> <tex-math notation="LaTeX">$q$ </tex-math></inline-formula>-parameters of the individual devices. With this formalism, we may state the Thévenin-Norton theorem in a uniform manner by saying that, for any given set of parameter values, if at least one of the functions <inline-formula> <tex-math notation="LaTeX">$p_{e}$ </tex-math></inline-formula> and <inline-formula> <tex-math notation="LaTeX">$q_{e}$ </tex-math></inline-formula> does not vanish then the voltage-current behavior at the port is characterized by a homogeneous triad <inline-formula> <tex-math notation="LaTeX">$(p_{e}: q_{e}: s_{e})$ </tex-math></inline-formula>. In particular, the assumptions <inline-formula> <tex-math notation="LaTeX">$p_{e} \neq 0$ </tex-math></inline-formula> and <inline-formula> <tex-math notation="LaTeX">$q_{e} \neq 0$ </tex-math></inline-formula>, respectively, characterize the existence of the Thévenin and the Norton equivalents, but the formulation proposed above avoids the need to make an a priori distinction between one form and another. The excitation parameter <inline-formula> <tex-math notation="LaTeX">$s_{e}$ </tex-math></inline-formula> can be computed by inserting any admissible load at the port, but also analytically, in terms of the topology of the underlying digraph. The results hold without the need to specify whether each circuit element is a source or a passive device, much less to assume whether they are voltage- or current-controlled.


I. INTRODUCTION
T HE equivalent circuit concept can be traced back to the work of H. Helmholtz, who as early as in 1853 discussed what would be later called the Thévenin equivalent of a oneport [1]. This equivalent circuit is nowadays named after L. C. Thévenin because of his 1883 papers [2], [3] on the topic. The current source equivalent, also known as the Norton or Mayer-Norton equivalent circuit, was independently discovered by H. F. Mayer [4] and E. L. Norton [5] in 1926. A detailed compilation of the contributions of these authors to this important concept in circuit theory can be found in [6] and [7]. The existence of these two closely interrelated results is yet another expression of a pervasive duality in circuit modeling. This duality already arises at the very first stages of the theory, when one chooses between a current-controlled and a voltagecontrolled description of a linear device by writing Ohm's law as v = zi or i = yv, respectively. Even if the choice of a current-controlled or a voltage-controlled description is perfectly admissible in most practical cases, from a theoretical point of view such a choice always entails a lack of generality.
In this paper, we exploit the homogeneous framework introduced in [8] (find some precedents of the use of this formalism in [9], [10], and [11]) to provide a general formulation of the Thévenin and Norton theorems. We use these two names for brevity, even if it would be more accurate to speak of the Helmholtz-Thévenin and Mayer-Norton theorems. Ultimately, our approach relies on the formulation of Ohm's law in the homogeneous form pv − qi = 0, for a pair of parameters p, q not vanishing simultaneously. In greater generality, an excitation term can be added to accommodate active devices (sources) described by a relation of the form pv −qi = s. This way, we can handle linear circuits simply as graphs in which every edge is equipped with three homogeneous parameters ( p : q : s), where ( p, q) = (0, 0). The notation ( : : ) indicates that only the ratios between the different entries matter, hence the "homogeneous" label.
In a nutshell, our unified formulation of the Thévenin-Norton theorem will make use of the notions of a nondegenerate one-port and of an admissible load, to be defined later, and says that the voltage and the current at such a port obey a relation of the form p e v 0 + q e i 0 = s e (1a) where the homogeneous parameters ( p e : q e : s e ), ( p 0 : q 0 : s 0 ) characterize the one-port and the load, respectively. That is, a nondegenerate one-port is simply characterized in such homogeneous terms as a two-terminal device, without the need to prioritize a description as a (possibly non-ideal) voltage or current source, contrary to the classical approaches leading to Thévenin results will be derived as straightforward consequences of Theorem 1: cf. Corollaries 1 and 2. The attention will be restricted to uncoupled problems, and in this context the parameters p e and q e amount to two variants of the Kirchhoff polynomial of the underlying graph. In the language of circuit theory, p e and q e will correspond to (the multihomogeneous version of) the open-circuit and short-circuit network determinants. Our homogeneous standpoint also makes it possible to avoid unnecessarily restrictive assumptions on the characteristics of devices, and allows one to formulate particular results in terms of impedances, admittances or hybrid descriptions simply by means of dehomogenization techniques. Details will be given later.
The paper is structured as follows. Section II provides the background on graphs and homogeneous circuit modeling needed to make the paper essentially self-contained. The main result, namely the homogeneous formulation of the Thévenin-Norton theorem, is discussed in Section III. A tree-based computation of the aforementioned excitation term s e can be found in Section IV: this is a somewhat technical result which is however necessary in order to have a complete characterization of the equivalent circuit. Section V discusses two circuit examples, the second one involving ideal switches, whereas Section VI compiles some concluding remarks. A few auxiliary results are driven to an appendix.

II. BACKGROUND A. Graphs and the Kirchhoff Polynomial
We compile in this section some background material on graphs. The reader is referred to the books [12], [13], [14], [15] for excellent introductions to the theory and, in particular, for the definition of some elementary concepts (incidence, adjacency, endpoints, connectedness, subgraphs, etc.) which, for brevity, are not detailed in what follows.
The attention will be restricted to finite, connected graphs with n ≥ 1 vertices (or nodes, in the language of circuit theory) and m ≥ 0 edges (branches). For simplicity, in many cases we assume without explicit mention that the sets of vertices and edges amount to V = {1, . . . , n} and E = {1, . . . , m}, respectively. When dealing with one-ports we will sometimes augment the set of edges toÊ = {0, 1, . . . , m}, with edge 0 accommodating a load eventually inserted at the port. We allow multiple edges (namely, edges joining the same pair of vertices) and loops (edges joining a vertex to itself). Be aware that the term "loop" is often used in circuit theory in a broader sense, namely for what we call a cycle, that is, a sequence v 0 , e 1 , v 1 , . . . , e k , v k = v 0 where all edges e i are incident with vertices v i−1 and v i , and e i = e j , v i = v j whenever 1 ≤ i < j ≤ k. Here k ≥ 1 is the length of the cycle: note that we allow cycles of lengths one and two. A spanning tree is a connected subgraph including all vertices and no cycles. Assigning a direction to all edges in a graph yields a directed graph or digraph. In a digraph, every edge is directed from its tail to its head: note that these two endpoints are different except if the edge is a loop.
A cutset K is a set of edges whose removal disconnects the graph, and which is minimal with respect to this property; that is, the graph remains connected under the removal of any proper subset of K . A one-edge cutset is called a bridge. Note that, as a set of edges, a cutset just corresponds to a subset of E: at several points and when there is no danger of ambiguity we will also identify cycles and spanning trees with the subset of E defined by their constituting edges. If T stands for a spanning tree, then T denotes the corresponding cotree. Given such a spanning tree, we use the terms twig and chord for the tree and cotree edges, respectively.
The removal of a single edge e from a graph G is called the deletion of e: the resulting edge-deleted graph is usually written as G \ e. Two other operations on graphs will play an important role in later discussions. Identifying two distinct (adjacent or not) vertices v 1 , v 2 means: (i) replacing both by a single vertex u; then (ii) replacing all edges joining v 1 to v 2 , as well as all loops incident with either v 1 or v 2 , by (the same number of) loops incident with u, and finally (iii) replacing each edge e incident with either v 1 or v 2 , but not with both, by a new edge which is incident with u and with the other endpoint of e. The contraction of an edge e is obtained after deleting e and (subsequently and only if e was not a loop) identifying the endpoints of e. This edge-contracted graph is denoted by G/e. Both G \ e and G/e have exactly one fewer edge than G. Additionally, G \ e has the same number of vertices as G, and so does G/e if e is a loop; otherwise G/e has one fewer vertex than G. Cutset and cycle matrices: The removal of the edges of a cutset K defines a graph with two connected components, say G 1 and G 2 . We may then assign K an orientation by choosing one of the ordered pairs (G 1 , G 2 ) or (G 2 , G 1 ): one may think of the oriented cutset as being directed from G 1 towards G 2 or from G 2 towards G 1 , respectively. In a digraph, each edge in an oriented cutset K may have either the same orientation as K or the opposite one: for instance, if the chosen orientation for the cutset is (G 1 , G 2 ), an edge of K has the same orientation as the cutset if its tail belongs to G 1 and its head to G 2 , and it has the opposite one if the tail and the head are on G 2 and on G 1 , respectively (note that, in light of the definition of a cutset, both endpoints cannot be in the same component G i ). Additionally, in a digraph two edges within a given cutset K are said to be coherently oriented in the cutset if, for some (hence any) orientation of the cutset, both edges either have the same orientation as the oriented cutset, or both have the opposite orientation to that of the cutset. Otherwise, we say that both edges have opposite orientations in the cutset.
A cutset matrix A = a j k of a connected digraph is an (n − 1) × m matrix with linearly independent rows and in which every row corresponds to an oriented cutset; notice that for simplicity we favor "cutset matrix" over the more common "reduced cutset matrix". To be specific, the entries a j k are defined as if edge k belongs to the oriented cutset j with the same orientation −1 if edge k belongs to the oriented cutset j with the opposite orientation 0 if edge k does not belong to j.
For brevity, we omit the definition of an oriented cycle and, for digraphs, the details about whether an edge of an oriented cycle has the same orientation as or the opposite one to the oriented cycle itself, as well as those concerning coherent and opposite orientation of two edges in a cycle. The reader may carry out the details by analogy with the corresponding notions for cutsets, and Fig. 3 in Section V may be of help: edge no. 1 and the dotted edge (corresponding to the load) have opposite orientations in the first cycle and coherent orientations in the second one. In this setting, a cycle matrix B = b j k is an (m − n + 1) × m matrix (where the number of rows owes to the fact that the attention is restricted to connected digraphs) with linearly independent rows and in which every row corresponds to an oriented cycle, with if edge k belongs to the oriented cycle j with the same orientation −1 if edge k belongs to the oriented cycle j with the opposite orientation 0 if edge k does not belong to j.
One may prove that the vector defined in this manner by any other oriented cutset or cycle belongs to the space spanned by the rows of A or B, respectively. We will also make use of the fact that a square submatrix of order n − 1 of a cutset matrix A is nonsingular if and only if its defining columns correspond to a spanning tree. Similarly, a square submatrix of order m − n + 1 of a cycle matrix B is nonsingular if and only if its columns correspond to the chords defined by a spanning tree. A well-known construction of the cutset and cycle matrices arises from the choice of a spanning tree. Indeed, every twig is known to define a unique cutset together with some chords (or just by itself if it is a bridge), and this fundamental cutset can be given the orientation defined by the twig. Similarly, the chords of a spanning tree define a set of fundamental cycles: each one is composed of a chord and some twigs (except if the chord is itself a loop) and can be given the orientation of its defining chord. Using fundamental cutsets and cycles one gets the fundamental matrices A = I A T , B = (B T I ), by choosing an appropriate ordering of the circuit branches and of the rows of both matrices. Such fundamental matrices are often constructed from the same spanning tree, but this need not be necessarily the case. The Kirchhoff polynomial: Assign to every edge j ∈ {1, . . . , m} a pair of indeterminates p j , q j (a circuit-theoretic meaning will be given later to these parameters) and write p = ( p 1 , . . . , p m ), q = (q 1 , . . . , q m ). In this context and by letting T stand for the set of spanning trees, the multihomogeneous Kirchhoff polynomial is defined as That is, within the term defined by a given spanning tree T , each edge j contributes a p j or a q j factor depending on whether it is a twig or a chord. Note that (2) is homogeneous of degree one in each pair of variables ( p j , q j ), hence the "multihomogeneous" label: this means that, for every j , each term either has p j or q j as a factor, but not both. For the singleton (that is, the graph with one vertex and no edges) we set Kir ( p, q) = 1. We refer the reader to the first example in Section V: see, specifically, (30) (but also (31)). When dealing with one-ports, we will make use of an important relation between the Kirchhoff polynomial of a graph G and those of the graphs obtained from the contraction and the deletion of a given edge j (namely G/j and G \ j ; to avoid any ambiguities, in what follows we make each graph explicit as a subscript when denoting the different Kirchhoff polynomials). The following contraction-deletion formula can be proved to hold for any connected graph with m ≥ 1 and any edge j : if j is neither a bridge nor a loop wherep andq stand for ( p 1 , . . . , p j −1 , p j +1 , . . . , p m ) and (q 1 , . . . , q j −1 , q j +1 , . . . , q m ). A detailed discussion can be found e.g. in [12] but the reader should have no difficulty in carrying out the details on their own. The key idea is that each spanning tree belongs to one of two groups: either it includes j , in which case the remaining twigs can be shown to define a spanning tree of the edge-contracted graph, or it does not include j , and then it defines a spanning tree also in the edgedeleted graph. Both groups yield the terms p j Kir G/j (p,q) and q j Kir G\ j (p,q), respectively, in (3).

B. Homogeneous Circuit Models
Along the lines presented in Section I (find a detailed introduction in [8]), we will model any linear, time-invariant, uncoupled electrical device by means of a relation of the form where ( p, q) = (0, 0). The parameters ( p : q : s) define homogeneous coordinates of a point on a certain projective space, since they are defined only up to a nonzero multiplicative constant: formally, ( p 1 : q 1 : s 1 ) and ( p 2 : q 2 : s 2 ) denote the same (projective) point if and only if there is a nonzero constant μ such that ( p 1 , q 1 , s 1 ) = μ( p 2 , q 2 , s 2 ). Depending on the context, these parameters may take complex values (for circuits operating in sinusoidal steady state, or modeled in the Laplace domain) or real ones (for DC resistive circuits). Throughout the document we will focus on the former scenario but it is worth emphasizing that the whole analysis is also valid in the real context. When s = 0, the relation (4) amounts to and we speak in this case of a passive device, to mean a device which is not a source. Bear with the ambiguity: a resistor with negative resistance falls in this category. Since p and q cannot vanish simultaneously, one can always recast (5) either as v = zi , with impedance z = q/ p, or as i = yv, with y = p/q denoting the admittance. But the form (5) avoids the need to specify a priori whether the device is current-controlled or voltage-controlled: in this general context, the homogeneous pair ( p : q) is called the projective impedance of the device, and the reader should keep in mind that p and q are not uniquely defined in the sense that ( p 1 : q 1 ) = ( p 2 : q 2 ) if p 1 q 2 = p 2 q 1 . The cases p = 0 and q = 0 describe an opencircuit (zero admittance) and a short-circuit (zero impedance), respectively. By contrast, the assumption s = 0 means that (4) stands for a source. Again, provided that p = 0 one can resort to a current-controlled form and the source admits a description as a voltage source, which is an ideal one if and only if q = 0. The voltage in the source is s/ p and the series impedance is q/ p, what reflects again the homogeneous nature of the parameters ( p : q : s): only the ratios between the entries matter. Similar remarks apply to the case q = 0, allowing for a voltage-controlled description of the device as a current source.
This formalism paves the way for a truly general symbolic circuit analysis in the linear context (find an extension to the nonlinear context in [16], and a discussion of the homogeneous approach for nodal analysis models of nonlinear circuits in [17]). Indeed, we just treat a linear, uncoupled circuit as a graph in which every edge j = 1, . . . , m is equipped with three homogeneous parameters ( p j : q j : s j ), with the proviso that p j and q j do not vanish simultaneously. Of course there is no need to provide specific numerical values, but the symbolic nature of the approach goes much further, since there is no actual need to specify whether any device is voltage-controlled or current-controlled, nor even to distinguish between passive elements and sources.
In order to write down the equations of an uncoupled circuit in this homogeneous framework, let P and Q be diagonal matrices of order m whose j -th entries are p j and q j , respectively, and denote s = (s 1 , . . . , s m ). By writing Kirchhoff laws as Ai = 0, Bv = 0, in terms of any two cutset and cycle matrices A, B, one gets the circuit equations in the form ⎛ As shown in [8], the determinant of the coefficient matrix of this system equals for a nonzero, integer constant k AB . Here we are denoting p = ( p 1 , . . . , p m ), q = (q 1 , . . . , q m ). For later use, the constant k AB equals for any spanning tree T [8]. In particular, for the fundamental matrices defined by a spanning tree one has k AB = 1. The expression (7) provides a multihomogeneous form for the network determinant: in particular, Kirchhoff's or Maxwell's forms for this determinant can be simply obtained by dehomogenizing the expression given in (7). For instance and in broad terms, Maxwell's form is based on the assumption that all devices are voltage-controlled, which is equivalent to saying that q j = 0 for all j = 1, . . . , m. By dividing (7) (with Kir ( p, q) defined in (2)) by the product q 1 q 2 · · · q m , one gets the usual sum of tree-admittance products defining the determinant of the nodal admittance matrix (see e.g. [14], [18]), with admittances y j = p j /q j . Similarly, in the dual case one gets Kirchhoff's polynomial in terms of cotree-impedance products. At this point, the reader may find the examples discussed in Section V useful: specifically, the left-hand sides of (36) and (37) will provide the dehomogenization of (30) and (31), respectively, in terms of impedances. Find additional details in this regard in [8].

III. THÉVENIN-NORTON THEOREM IN THE
HOMOGENEOUS SETTING Sections III and IV present the main results of the paper, which are based on the notions of a nondegenerate one-port and an admissible load (cf. Definitions 1 and 2 and Proposition 1). Broadly, the equivalent circuit theorem expresses the fact that the behavior at the port can be described by a driving point characteristic of the form αv 0 + βi 0 = γ . Disregarding for the moment the actual value of the quantity in the right-hand side, the coefficients of v 0 and i 0 will turn out to be defined by the Kirchhoff polynomials depicted in (9): in essence, this is the content of Proposition 2. The excitation term γ above, to be denoted as s e in (18a), can be computed from a particular solution of the circuit equations, as in Theorem 1 or, in greater generality, in the terms presented in Theorem 2 (Section IV). To finish this overview, let us mention that the Thévenin and Norton forms can be easily derived as dehomogenizations of the abstract equivalent circuit of Theorem 1: see Corollaries 1 and 2.

A. Nondegenerate One-Ports and Admissible Loads
By a one-port we mean a connected graph G with n ≥ 2 vertices in which we distinguish a pair of distinct vertices j , k. In order to accommodate a load at the port we will also consider the augmented graphĜ, which includes an additional edge with endpoints j and k. We will use the subscript 0 for this additional edge, and write accordingly ( p 0 : q 0 : s 0 ) for the homogeneous parameters of a load eventually inserted at the port. As usual, by assigning an arbitrary set of directions to the edges ofĜ we make it a digraph.
We will also make use of the graph G * obtained after identifying the vertices j and k in G; note that this is also the graph that one obtains after contracting the load in the augmented graphĜ, and for this reason we will sometimes refer to G * as the load-contracted graph.
A key role in the whole analysis will be played by the Kirchhoff polynomials of both G and G * , which describe the network determinants when the port is open-circuited and short-circuited, respectively (worth recalling at this point is the construction of the Kirchhoff polynomial: cf. (2)). To simplify notation, let us write where the subscript e comes from "equivalent". The reason for the use of this term will become apparent later.
Definition 1: We say that a one-port is nondegenerate if ( p e , q e ) = (0, 0). Needless to say, whether the nondegeneracy condition is met or not depends on the actual values of the vectors of parameters p = ( p 1 , . . . , p m ) and q = (q 1 , . . . , q m ) characterizing the individual devices and entering the polynomials p e , q e in (9).
Definition 2: A device with homogeneous parameters ( p 0 : q 0 : s 0 ) defines an admissible load for a given nondegenerate one-port if p e q 0 + q e p 0 = 0.
Note that for any given nondegenerate one-port there is exactly one nonadmissible passive load, namely the one defined in homogeneous coordinates by ( p e : −q e ). We will call this the resonant load of the nondegenerate one-port. The resonant loads of an ideal voltage source and of an ideal current source are the short-circuit and the open-circuit, respectively. By contrast, we may say that no admissible load exists for a degenerate one-port. The notions introduced above are motivated by the following result, which is a straightforward consequence of the contraction-deletion formula (3). We use the expression "uniquely solvable" to mean that the circuit equations, with a load inserted at the port, admit a solution which is unique.
Proposition 1: Consider a nondegenerate one-port. The circuit obtained after inserting a load ( p 0 : q 0 : s 0 ) at the port is uniquely solvable if and only if this load is admissible.
Proof: LetÂ,B be arbitrary cutset and cycle matrices for the augmented circuit. Additionally, denote byP andQ the diagonal matrices with diagonal entries p 0 , . . . , p m and q 0 , . . . , q m , respectively, and writeŝ = (s 0 , . . . , s m ). The behavior of the augmented circuit is then described by the equations are the vectors of branch currents and voltages in the augmented circuit. As in (7), the determinant of the coefficient matrix reads as kÂBKirĜ (p,q) for a certain nonzero constant kÂB: here we are denotingp = ( p 0 , . . . , p m ) andq = (q 0 , . . . , q m ). We now make use of the fact that the edge at the port is neither a bridge in the augmented circuit (because the original graph was assumed to be connected) nor a loop (since the vertices defining the port are assumed to be distinct). The contractiondeletion formula (3) applied at the port then yields a quantity which is different from zero if and only if the admissibility condition (10) holds. This, together with the fact that kÂB = 0, makes the coefficient matrix of (11) nonsingular (and, accordingly, the augmented circuit uniquely solvable) if and only if the load is admissible, as claimed. 2 A key ingredient in the formulation of our main result (Theorem 1) will be Proposition 2 below. Its proof will make use of the properties of the cutset and cycle matrices stated in Lemmas 1 and 2, which are driven to the Appendix in order to allow for an easier read of the main results. Within this and later results, v 0 and i 0 stand for the voltage and the current at the port, and remember that p e and q e are the Kirchhoff polynomials defined in (9). Proposition 2: Given a nondegenerate one-port, the quantity takes a common value for all admissible loads.
be two solutions of the circuit equations corresponding to two different admissible loads. Disregarding the equation defined by the load, both solutions satisfy the same linear system, namely ⎛ where we are using the cutset and cycle matriceŝ for the augmented circuit, allowed by Lemma 1 (cf. items (iii) and (iv) there). Using elementary linear algebra, the identity ⎛ stemming from (14) can be recast as ⎛ The matrix in the left-hand side is necessarily singular (noninvertible), and the expansion of its determinant along the first column then yields where A and B * are the matrices displayed in (41) and (42), respectively. Using the constants arising in (43), the left-hand side of the equation above reads as but, using the identity k A * B * = (−1) n+1 k AB from (44) and the fact that these constants do not vanish, this is equivalent to saying that , q), q e = Kir G * ( p, q). The identity above, rewritten as shows that, indeed, p e v 0 + q e i 0 is an invariant quantity, not depending on the actual load inserted at the port (as far as it is admissible). This proves the claim. 2

B. Equivalent Circuit Theorem
We are now in a position to formulate the equivalent circuit theorem in homogeneous terms. The proof will follow in a straightforward manner from the notions and results just discussed.
Theorem 1: Consider a nondegenerate one-port. For any admissible load ( p 0 : q 0 : s 0 ), the voltage v 0 and the current i 0 at the port are defined by the solutions of the system with p e , q e given in (9). The excitation term s e equals p e v 0 + q e i 0 , with (v 0 , i 0 ) coming from the solution of the circuit equations for any fixed admissible load ( p 0 : q 0 : s 0 ). Before proceeding with the proof, let us mention that an alternative expression for the excitation term s e , formulated in terms of the circuit topology, will be provided in Theorem 2. By contrast, Theorem 1 reflects a common practice in circuit theory, namely the computation of the excitation from a specific solution which, almost invariably, is the open-circuit voltage or the short-circuit current. Additional details in this direction will be given below.
Proof of Theorem 1: Just note that the working assumptions imply that the circuit augmented with the load has a unique solution (Proposition 1), and its components at the port, v 0 , i 0 , satisfy not only (18a), in light of Proposition 2, but also (18b) since this equation just defines the characteristic of the load. Note also that (18) has no additional solutions because the admissibility condition (10) makes the coefficient matrix nonsingular.
2 We emphasize that Theorem 1 above provides an inherently symmetrical formulation of the equivalent circuit theorem: a nondegenerate one-port just amounts to an equivalent device characterized by the homogeneous parameters ( p e : q e : s e ): cf. Fig. 1. Besides the fact that the equivalent circuit simply amounts to a two-terminal device, this figure emphasizes that there is no need to choose between a voltage-source and a current-source form for the equivalent circuit (more precisely, between a current-controlled form for the source and the impedance, as in Thévenin's equivalent, and a voltage-controlled form for both, used in Norton's). Both Thévenin and Norton equivalents can be actually derived from Theorem 1 under specific working assumptions, as detailed in what follows. Thévenin and Norton forms: The assumptions p e = 0 and q e = 0 guarantee that the Thévenin and Norton equivalents, respectively, are well-defined. Note that at least one of these conditions always holds for a nondegenerate one-port because of the assumption ( p e , q e ) = (0, 0). Corollary 1 (Thévenin equivalent circuit): Consider a oneport for which p e = 0. The equivalent circuit model (18) can be written in Thévenin's form, namely where v th is the Thévenin voltage and z e = q e / p e is the Thévenin impedance. This statement is a straightforward consequence of Theorem 1, just obtained by dividing (18a) by p e . Implicitly, this is supported on the fact that the assumption p e = 0 makes the open-circuit load p 0 = 0, q 0 = 1 admissible. The open-circuit voltage (a synonym for the Thévenin voltage) at the port, v th , is therefore well-defined, and the fact that for this solution one has i 0 = 0 makes the invariant quantity (13) read as p e v th . The expression depicted in (19a) follows. The dual scenario is defined by the assumption q e = 0: in this context, the short-circuit load p 0 = 1, q 0 = 0 is admissible, and the short-circuit current (also called the Norton current) i n at the port is well-defined. This, together with v 0 = 0, yields the expression q e i n for the invariant quantity (13). Altogether, this supports the following statement.
Corollary 2 (Norton equivalent circuit): For a one-port with q e = 0, the equivalent circuit model (18) can be recast in Norton's form, that is, as where i n is the Norton current and y e = p e /q e is the Norton admittance.
Remarks on the parameters of the equivalent circuit: The Thévenin impedance is often referred to in the literature as the effective impedance, and z e = q e / p e (with the proviso that p e = 0) yields a multihomogeneous version of what is known as Kirchhoff's formula, tracing back to his seminal 1847 paper [19]; let us recall once again that p e and q e are given in (9). Worth mentioning is that this parameter is often obtained in practice by inserting an ideal current source at the port and annihilating the internal circuit sources (see e.g. [18]); the impedance is then computed as the ratio between the voltage and the current at the port. This can be easily accommodated in the framework introduced above: one just needs to note that the assumption p e = 0 implies that any ideal current source (characterized by the parameters p 0 = 0, q 0 = 1, with s 0 = 0 being the current injected by the source; the value s 0 = 0 corresponds to an open circuit, used in the computation of the Thévenin voltage as indicated above) is admissible. Not by chance, the unique solvability of the circuit equations obtained after inserting a current source at the port, expressed in our framework by the condition p e = 0, defines the classical characterization of the existence of the Thévenin equivalent [18].
In the dual setting, y e = p e /q e is often called the effective admittance and, similarly, can be computed by inserting an ideal voltage source at the port and annihilating all internal sources. Notice that the assumption q e = 0 makes any ideal voltage source admissible.
Finally, let us mention that when both conditions p e = 0 and q e = 0 do hold, then the invariant quantity (13) arising in Proposition 2 can be computed either as p e v th or as q e i n . This makes it possible to state in homogeneous terms the wellknown identity which can be recast in either one of the classical forms, namely as v th = z e i n or as i n = y e v th .

IV. EXPRESSING THE EXCITATION TERM IN TERMS OF TREES
In Theorem 1, the excitation term s e is computed by means of a particular solution to the circuit equations. Alternatively, one may express s e in graph-theoretic terms, without the need to compute such a particular solution: this is the content of Theorem 2 below. A benefit of proceeding as in Theorem 2 is the generality of this approach: for instance, when using Theorem 1 in parametrized problems, one might need to analyze certain cases separately in order to compute a particular solution, since the load used in the computation of such a solution must be admissible for all parameter values. This caution is unnecessary when using Theorem 2. The graph-theoretic approach of Theorem 2 might also be of help in related problems involving e.g. input-output transfer functions, which are in the scope of future research. Worth emphasizing is that, except for the fact that we state the result in homogeneous terms, the main idea can be already found in Kirchhoff's 1847 paper [19].
Note that in (22) below we use i as a running index for the set of edges: the reader should avoid mixing this up with the use of this symbol to denote currents. Again, we drive an auxiliary result (Lemma 3) to the Appendix. Before proceeding with the result, it may be of help to recall that G stands for the digraph underlying the original circuit, without any load connected at the port and with an arbitrary assignment of reference directions to all branches, G for the augmented digraph, which includes an additional directed branch at the port, and G * for the so-called loadcontracted digraph, in which the vertices defining the port are identified. Remember also the construction of the cutset and cycle matricesÂ andB ofĜ displayed in (15), and that the matrices A, B, A * and B * used in the proof are cutset/cycle matrices for G and G * , respectively. We will also make use of the fact that a spanning tree of G also defines a spanning tree of the augmented digraphĜ.

Theorem 2: With the setup of Theorem 1, the excitation term s e in (18a) equals
where, for each edge i , the set T * i stands for the family of spanning trees of G which For any such tree T , the coefficient α T,i equals +1 or −1, depending on whether edge i and the load have opposite or coherent orientations, respectively, in the aforementioned cycle. Proof: As stated in Theorem 1, the excitation term s e can be computed as p e v 0 + q e i 0 , with v 0 , i 0 given by the solutions of the circuit equations for any fixed admissible load ( p 0 : q 0 : s 0 ). Since the admissibility condition (10) does not involve s 0 , we may just set s 0 = 0. For any such admissible load and along the lines of previous sections, the circuit equations can be written as with the determinant of the coefficient matrix reading as kÂB ( p e q 0 + q e p 0 ); hereÂ andB correspond to the matrices specified in (15).
Both v 0 and i 0 can be computed using Cramer's rule, which yields for p e v 0 + q e i 0 the expression 1 kÂB ( p e q 0 + q e p 0 ) Using two determinantal expansions and noticing that −q 0 is in the (m + 2, 1)−position in the first matrix, this reads as The first matrix takes the form of the second after m column transpositions, and therefore the latter expression amounts to By expanding the determinant along the first column and using (41), the expression depicted in (24) equals because the i -th entry of s, namely s i , is in the (m + i + 1, 1)−position within the matrix, and the resulting exponent has the same parity as m + i . By P [i] and Q [i] we denote the submatrices of P and Q obtained after removing their respective i -th rows. Now, using the relation depicted in (42) and Lemma 3, (25) can be written as where the notation goes as follows: A i) and B * i) (resp. A (i and B * (i ) are the submatrices of A and B * defined by columns  1, . . . , i − 1 (resp. i + 1, . . . , m). Additionally, P i) and Q i) (resp. P (i and Q (i ) denote the diagonal matrices defined by the entries in positions 1, . . . , i − 1 (resp. i + 1, . . . , m) of the main diagonal of P and Q.
The determinants arising in (26) will be computed by means of a generalized Laplace expansion [20] along the first n − 1 rows. Notice the diagonal structure of P i) , P (i , Q i) , Q (i , and remember that the only maximal order square submatrices of A (resp. of B * ) yielding nonzero determinants are those corresponding to spanning trees of G (resp. to cotrees of G * ). Moreover, because of the structure of the matrices depicted in (26), the only nonzero terms in the Laplace expansion can be seen to involve products of the form where the pairs (T, T * ) are formed by a spanning tree and a cotree of G and G * , respectively, just having edge i in common. The latter condition implies that T = T * ∪{i } (notice that a spanning tree of G has exactly one more edge than a spanning tree of G * ). The spanning trees of G so construed are the ones meeting the requirements stated in items (i) and (ii) within the statement of the theorem. Indeed, consider the fundamental cycle ofĜ defined by the load w.r.t. the spanning tree T . After contracting the load, this yields a cycle of G * . Should the original fundamental cycle not include i , the corresponding cycle of G * would be entirely formed by twigs of the spanning tree T * , which is a contradiction.
Because of the form ofB in (15), the existence of such a cycle means that there exists a linear combination of rows of B which can be added to b in a way such that the entries of the first row which correspond to chords of T different from the load are annihilated; moreover, the resulting i -th entry in the first row equals either +1 or −1, depending on whether edge i and the load have coherent or opposite orientations in the aforementioned cycle. With the notation introduced in the statement of the theorem, this entry can then be written as −α T,i . The operation just described does not affect the determinant of det B * T * , which therefore equals −α T,i (−1) β i det B T = α T,i (−1) β i +1 det B T : here β i stands for the number of chords of T * which precede i .
With the remarks just stated, the generalized Laplace expansion of the determinants arising in (26) reads as (27) with the first exponent arising from the indices of the rows and columns involved in the expansion: we are using γ i to denote the number of twigs of T which are located beyond i , and worth clarifying is that this term owes to the presence of the column which includes B * i in (26) (note that γ i and β i depend on T and T * , respectively, but we do not make this dependence explicit in order to avoid a cumbersome notation). Using the expression (8) for k AB and (27), (26) can be then written as By construction, one can also show that β i + γ i = n − i − 1 where, again, we encourage the reader to check the details. This gives (28) the form Finally, the identity kÂB = (−1) n+1 k AB from (44) yields the expression depicted in (22). This completes the proof.
2 For illustration, we refer the reader to the first example addressed in the forthcoming section and, specifically, to the expression displayed in (32) and Fig. 3. Finally, for the sake of completeness, let us mention that the value of each coefficient α T,i can be alternatively obtained by looking at the fundamental cutset defined by i in the augmented digrapĥ G, which necessarily includes the load: this follows from a well-known graph-theoretic result, according to which the fundamental cycle defined by a given chord j includes a twig i if and only if the fundamental cutset defined by i includes j ; moreover, both edges are coherently oriented in the cycle if and only if they have opposite orientations in the cutset. Therefore, α T,i equals +1 or −1, depending on whether i and the load have coherent or opposite orientations, respectively, in the fundamental cutset ofĜ defined by i w.r.t. the spanning tree T .

A. Example 1
Consider the one-port depicted in Fig. 2, where the dotted, unnumbered edge will correspond to the load. This one-port corresponds to a bridge circuit, in which the edge labeled as 1 typically accommodates an ideal voltage source and, depending on the electrical nature of the devices on edges 2-5 one may get a Wien bridge, a Wheatstone bridge or others. Such circuits have been traditionally used in circuit engineering to measure certain electrical parameters, by using a balance condition which annihilates the voltage drop at the port, regardless of the actual values of the source voltage and the load. We will use this example to illustrate most of the concepts and results discussed in previous sections.
An ideal voltage source at edge 1 is characterized by the parameter values p 1 = 1, q 1 = 0, with the voltage in the source given by the parameter s 1 . In order to compute the Kirchhoff polynomial of the resulting circuit (with the load open-circuited), one just needs to find the set of spanning trees which include edge 1: this is due to the fact that all terms of (2) coming from trees not including this edge do vanish, owing to the q 1 = 0 condition. This yields where the factorization is aimed at later use. Notice that this reflects the existence of four spanning trees including edge 1, namely the ones defined by edge 1 itself together with the edge pairs 2-3, 2-5, 3-4 and 4-5, respectively. May the reader check this in light of Fig. 2. By contracting the load, one gets the Kirchhoff polynomial describing the short-circuit network determinant, namely where, again, we have grouped together certain terms for later convenience. Again, this corresponds to the four spanning trees which include edge 1 in the load-contracted circuit, as the reader may easily check.
To complete the characterization of the equivalent circuit, let us further assume (for the sake of simplicity) that the devices on edges 2-5 are passive, so that s i = 0 for i = 2, . . . , 5. In order to compute the equivalent excitation s e at the port in terms of the voltage s 1 at the source, we need to provide an explicit orientation for the source and the load (incidentally, worth mentioning is that the coefficient of s i within the expression defining s e in (22) does not depend on the chosen orientation for the remaining edges; that is, the sign only depends on the relative orientations of edge i and the load). Assume that the voltage source (edge 1) is oriented top-down and that the load is oriented from left to right. The excitation term turns out to be with the balance condition simply reading as s e = 0, that is, The expression displayed in (32) can help illustrate the content of Theorem 2. Out of the four spanning trees of the original graph including the source (edge 1), those defined by edges 1, 2, 3 and 1, 4, 5 do not have edge 1 in the fundamental cycle defined by the load in the augmented circuit (such fundamental cycles are easily seen to be formed by the load and edges 2, 3 and 4, 5, respectively). By contrast, with respect to the spanning tree defined by edges 1, 2, 5, the fundamental cycle defined by the load actually includes edge 1 (see the first cycle depicted in Fig. 3): furthermore, edge 1 and the load have opposite orientations in any possible orientation of that cycle, and this is responsible for the positive sign in the first term of (32). Finally, with respect to the spanning tree defined by edges 1, 3, 4, the fundamental cycle of the load includes again edge 1, and in this case these two edges are coherently oriented in any possible orientation of the cycle (cf. the second cycle of Fig. 3). This yields the negative sign in the second term of (32). The expressions given above for p e , q e and s e provide a completely general characterization of the one-port. Note in particular that it is nondegenerate for device parameters guaranteeing that at least one of the expressions (30) or (31) does not vanish (some parameter values making the one-port degenerate will be presented later). It is worth discussing the particular cases in which the Thévenin and the Norton equivalents are well-defined, and we are also interested in showing how these homogeneous expressions can be particularized to characterize the equivalent circuit when classical descriptions (current-or voltage-controlled) are assumed for the devices: all this is addressed in what follows. Thévenin and Norton equivalents: The condition p e = 0, with p e given in (30), guarantees that the Thévenin equivalent circuit is well-defined. In this scenario, the equation characterizing the port amounts to (19a), with the parameters v th = ( p 2 q 3 q 4 p 5 − q 2 p 3 p 4 q 5 )s 1 ( p 2 q 4 + q 2 p 4 )( p 3 q 5 + q 3 p 5 ) , z e = ( p 2 q 4 + q 2 p 4 )q 3 q 5 + ( p 3 q 5 + q 3 p 5 )q 2 q 4 ( p 2 q 4 + q 2 p 4 )( p 3 q 5 + q 3 p 5 ) just given by the relations v th = s e / p e , z e = q e / p e . Similarly, the Norton equivalent is well-defined when q e = 0 (cf. (31)). Now, the parameters within the equivalent equation (20a) read as i n = ( p 2 q 3 q 4 p 5 − q 2 p 3 p 4 q 5 )s 1 ( p 2 q 4 + q 2 p 4 )q 3 q 5 + ( p 3 q 5 + q 3 p 5 )q 2 q 4 , Note that, for the sake of generality, in all these relations we are using a homogeneous description of all devices. Classical descriptions: In order to get a better understanding of the homogeneous approach, it may be useful to particularize the results to certain specific working settings. The important point is that, whatever the specific assumptions on the form of the devices, the corresponding formulas are obtained right the way by dehomogenization. For instance, when one assumes, as in Kirchhoff's original paper [19], that all devices admit an impedance description, then the condition p e = 0 characterizing the existence of the Thévenin equivalent is simply obtained by dividing (30) by the product p 2 p 3 p 4 p 5 . This yields whereas the corresponding condition characterizing the existence of the Norton equivalent, q e = 0, amounts to (cf. (31)); needless to say, all impedances are defined by the ratios z j = q j / p j . In this current-controlled setting, the parameters (34) of the Thévenin equivalent amount to It is also worth formulating the balance condition (33) in this current-controlled setting: proceeding as above, this condition is easily seen to amount to z 3 z 4 = z 2 z 5 . We leave it to the reader to compute the parameters of the Norton equivalent circuit in this current-controlled setup, and also to particularize the results to other working settings, namely to those in which all devices admit an admittance description but also to hybrid contexts, in which some devices are current-controlled and others are voltage-controlled. Parameter values defining a degenerate one-port: Finally, the reader might have guessed about a specific, nontrivial example of a one-port not meeting any of the nondegeneracy conditions p e = 0, q e = 0. The expressions presented above make it easy to provide such a set of parameter values: indeed, any combination of parameters for which both p 2 q 4 + q 2 p 4 and p 3 q 5 + q 3 p 5 vanish does annihilate both p e and q e , in light of (30) and (31), and therefore lead to a degenerate one-port. To be specific let us assume, as above, that all devices in edges 2-5 admit a current-controlled description (that is, assume that p j = 0 for j = 2, . . . , 5). One may then divide the expressions above by p 2 p 4 and by p 3 p 5 , respectively, to get the degeneracy conditions in terms of impedances: specifically, the relations z 2 + z 4 = 0 and z 3 + z 5 = 0 together define a degenerate one-port. Again, we leave it to the reader to formulate the corresponding conditions in voltage-controlled and hybrid scenarios.

B. Example 2
The homogeneous approach is particularly well-suited for the analysis of circuits with ideal switches. An ideal switch can be modeled as a passive device with homogeneous parameters ( p : q): the switch is closed when q = 0 (hence p = 0, and one may choose p = 1 for simplicity) and open when p = 0 (thus q = 0 or, again, q = 1). This simple model avoids the need to distinguish two different topologies corresponding to one situation and another. It is worth remarking that such a distinction is somewhat standard in the analysis of switched circuits: in the presence of n independent switches, the distinction of both topologies for each switch may require building up to 2 n circuit models in order to analyze the different configurations. This is the case, for instance, in the study of small-signal transfer functions of DC-DC converters computed by means of averaging techniques [21], [22], which typically require setting up a different model for each possible configuration of the switches. The homogeneous framework may considerably simplify the analysis by setting up a single model accommodating all such possible configurations.
Let us illustrate this by means of the circuit displayed in Fig. 4. This is a Laplace domain model of a half-wave zerocurrent switching (ZCS) quasi-resonant switch cell [21]. In this circuit, a linear inductor with positive inductance L is placed in series with the input and the first ideal switch (S 1 ), and a linear capacitor with positive capacitance C in parallel with the second ideal switch (S 2 ) and the load. Vertical branches are oriented top-down and horizontal ones from left to right. Following a standard approach in the Laplace domain, in order to account for the initial conditions in both reactive devices we add a voltage source in series with the inductor, yielding a total voltage drop across the device of s Li l − Li l0 volts, and a current source in parallel with the capacitor, what defines a total current of sCv c −Cv c0 amperes in the parallel connection. Our goal is to show that the behavior of the cell can be described in a unified manner, that is, without the need to set up a different model for each topology, by computing a unique equivalent circuit covering all scenarios. For illustrative purposes we will also discuss the settings in which the classical (Thévenin/Norton) equivalents are well-defined, even if the use of one or another is not needed in the analysis.
In the operation of this cell, each switching period is split into four different time subintervals, depending on the configuration of the switches, and a different circuit topology is typically examined in each one of these four subintervals (find a detailed discussion in [21,Chapter 20]). In our approach, the analysis can be performed in a much more straightforward manner because there is no need to distinguish different topologies depending on the on/off state of the switches. Proceeding as in the previous example, one gets the following parameters for the equivalent circuit: p e = p l p 1 q 2 q c + p l q 1 p 2 q c + p l q 1 q 2 p c +q l p 1 p 2 q c +q l p 1 q 2 p c q e = p l q 1 q 2 q c + q l p 1 q 2 q c s e = p l p 1 q 2 q c (v in + Li l0 ) + ( p l q 1 q 2 q c + q l p 1 q 2 q c )Cv c0 .
In the computation of the parameters p e and q e we have made use of the fact that voltage sources have p = 1 and q = 0, and therefore they enter all relevant spanning trees (namely, those yielding a nonzero term in the Kirchhoff polynomials); analogously, the current source capturing the initial conditions in the capacitor has p = 0 and q = 1, and for this reason it does enter any relevant spanning tree. With this in mind, the relevant spanning trees for the circuit obtained with the port open-circuited and short-circuited are easy to compute and we leave the details to the reader. Similarly, the expression for s e can be derived from Theorem 2 as in Example 1.
The expressions provided above get simpler by using the impedance description p l = 1, q l = s L for the inductor and the admittance one p c = sC, q c = 1 for the capacitor (this is equivalent to dividing all expressions by p l q c and setting z l = q l / p l = s L and y c = p c /q c = sC). This yields The equivalent circuit parameters (39) account for all configurations of the switches. Let us elaborate on how to exploit this information (we refer the reader to [21] for comparison).
On the subinterval of the switching period in which S 1 is closed and S 2 is open, the parameter values are p 1 = 1, q 1 = 0, p 2 = 0, q 2 = 1, hence p e = 1 + s 2 LC, q e = s L, s e = v in + Li l0 + s LCv c0 .
This corresponds to a series connection of a voltage source, an inductor and a capacitor, the one-port being defined by the terminals of the latter. Modeling, as in [21], the load as a current source with current I , the output voltage v 0 is then given by the relation p e v 0 + q e I = s e (cf. (18a)), that is, which is the Laplace domain analog of the model (20.14) in [21]. For completeness, let us also indicate that the parameter values p e = 1 + s 2 LC, q e = s L for the equivalent circuit show that the Thévenin equivalent is well-defined except at the resonant frequency, for which p e = 1 + s 2 LC = 0, whereas the Norton equivalent is well-defined for s = 0. The behavior on the other subintervals of the switching period is simpler, as detailed in what follows; let us recall once again that our goal is to show that all topologies are still described in terms of the parameter values given in (39) and that there is no need to set up a different model for other configurations of the switches. Cases in which both S 1 and S 2 are open are described by the parameter values p 1 = 0, q 1 = 1, p 2 = 0 and q 2 = 1, which yield p e = sC, q e = 1 and s e = Cv c0 . Needless to say, the equivalent circuit amounts to that of a capacitor; the Norton equivalent is always welldefined, and so is the Thévenin equivalent if s = 0. Similarly, the cases in which S 2 is closed are captured by the conditions p 2 = 1 and q 2 = 0, which yield q e = s e = 0 (the condition q e = 0 ruling out a Norton equivalent) and p e = q 1 + s Lp 1 . Notice that the latter does not vanish for any state of the S 1 switch, except if it is closed (i.e. if p 1 = 1, q 1 = 0) and s = 0: in this setup the one-port is degenerate. In all other cases the Thévenin equivalent is well-defined and amounts to that of a short-circuit.
A more detailed analysis of circuits with ideal switches in the homogeneous framework is in the scope of future research. This approach may be of interest not only in power electronics [11], [21], [22], but also in the theory of switched capacitor circuits [23], [24], in nanotechnology [25], [26] or in optoelectronics [27], [28], [29], just to name a few potential application fields.

VI. CONCLUDING REMARKS
We have shown in this paper that the homogeneous formalism allows for a simple and inherently symmetric statement of the Thévenin-Norton theorem. This homogeneous standpoint avoids the need to choose between a voltage-source and a current-source equivalent, thereby unifying the classical approaches to this problem. In particular, the existence of both Thévenin and Norton equivalents is captured by certain conditions on the parameters describing the homogeneous equivalent circuit (namely, p e = 0 and q e = 0, respectively). The homogeneous setting also provides full generality in the sense that neither an impedance nor an admittance description of individual devices is necessary: specific results for such classical descriptions can be easily obtained by means of a straightforward dehomogenization technique. Actually, the approach is a truly symbolic one in that one does not even need to specify in advance whether any given device is a source or a passive circuit element.
Our analysis has been carried out for uncoupled circuits, a context in which the homogeneous parameters p e and q e equal the Kirchhoff polynomials describing the open-circuit and short-circuit network determinants. The extension of the results to circuits displaying coupling effects and controlled sources defines a line for future work. A systematic application of the homogeneous approach to time-domain circuit modeling, in particular for the analysis of switched circuits, is also in the scope of future research. Lemma 1: Consider a connected digraphĜ with a distinguished edge e 0 , and denote by G and G * the digraphs resulting from the deletion and the contraction of e 0 , respectively. LetÂ andB be arbitrary cutset and cycle matrices ofĜ, and splitÂ where a stands for the first row of A. Then A * defines a cutset matrix of G * . (iv) Analogously, assume that B 0 = 1 0 . . . 0 T in (40). Write with b standing for the first row of B * . Then B defines a cycle matrix of G. Proof: Items (i) and (ii) follow from the definition of a cutset and a cycle, respectively. Indeed, for item (i) it suffices to note that, after the removal of e 0 , every cutset fromĜ results in a cutset of the edge-deleted digraph G (notice that the cutset remains unaltered if it did not include e 0 ); furthermore, the rows of A are easily seen to be linearly independent as a consequence of the fact that e 0 is not a bridge inĜ, what means that its deletion still yields a connected digraph. The (dual) reasoning for the cycle matrix in (ii) is analogous and we leave the details to the reader.
To address (iii), let us first remark that a choice ofÂ with A 0 = 1 0 . . . 0 T is always possible in the working scenario considered for item (iii): since e 0 is not a loop, one can always take a spanning tree in which e 0 is a twig, and the corresponding fundamental cutset matrix yields the desired form for A 0 . Worth emphasizing is that such a fundamental choice for the cutset matrix is not necessary for the assertion to hold: it is enough to guarantee that e 0 does not belong to the cutsets defined by the remaining rows ofÂ (that is, by all rows but the first), a property which is captured by the form assumed for A 0 . Indeed, this property can be shown to imply that the n −2 cutsets defined by all rows but the first are also cutsets of the edge-contracted digraph G * . These rows are linearly independent within A (since so were they inÂ and the first entry of all of them does vanish) and therefore make the block defined by A * a cutset matrix for the edge-contracted digraph, as claimed. Again, the reasoning supporting item (iv) proceeds along similar lines and is left to the reader. 2 The form given above to the cutset and cycle matrices provides a specific relation between the constants arising in the network determinants ofĜ, G * and G (endowed with the corresponding parameter vectorsp,q or p, q, respectively). This is the content of Lemma 2 below. To be specific, with the setup of items (iii)-(iv) above let us denote Proof: With the structure given in (15) toÂ andB, we have where we encourage the reader to check the exponents arising in the determinantal expansions. Using (43), the last relation obtained above reads as kÂBKirĜ (p,q) = p 0 k A * B * Kir G * ( p, q) + q 0 (−1) n+1 k AB Kir G ( p, q), and the relation (44) then follows by identifying polynomial coefficients after using the expression given in (12) for KirĜ (p,q). 2 Finally, in the proof of Theorem 2 we made use of the following auxiliary result. Note that we use K to denote either R or C, in order to accommodate both real and complex entries in the matrices P i , Q i .

ACKNOWLEDGMENT
The author also wants to acknowledge the support of the Deputy Directorate for Research of the ETSI Telecomunicación, Universidad Politécnica de Madrid.