trading_system_paper_revised_manuscript.pdf (1.01 MB)

Acceleration of Trading System Backend with FPGAs using High Level Synthesis Flow

preprint

posted on 12.05.2022, 19:20 by sunil puraniksunil puranik, mahesh barve

The Orders/second and latencies of Order Processing with software obtained from a Stock Exchange

History

Email Address of Submitting Author

sunilsavitap@students.vnit.ac.in

Submitting Author's Institution

Tata Consultancy Services

Submitting Author's Country

India

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Categories

Computing and Processing

Keywords

FPGA.Accelerator Trading Systems TCPIP

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