An 8-Channel Ambulatory EEG Recording IC With In-Channel Fully-Analog Real-Time Motion Artifact Extraction and Removal

Wereport the design, implementation, and experimental characterization of an 8-channel EEG recording IC (0.13 <inline-formula><tex-math notation="LaTeX">$\mu$</tex-math></inline-formula>m CMOS, 12 mm<inline-formula><tex-math notation="LaTeX">$^{2}$</tex-math></inline-formula> total area) with a channel architecture that conducts both the extraction and removal of motion artifacts <italic>on-chip</italic> and <italic>in-channel</italic>. The proposed dual-path feed-forward method for artifact extraction and removal is implemented in the analog domain, hence is needless of a DSP unit for artifact estimation, and its associated high-DR ADCs and DACs employed by the state of the art for artifact replica generation. Additionally, the presented architecture improves system's scalability as it enables channels' stand-alone operation, and yields the lowest reported channel power consumption among works featuring motion artifact detection/removal. Following an experimental study on electrode-skin interface electrical characteristics for dry electrodes in the absence and presence of motions, the article presents the channel architecture, its detailed signal transfer function analysis, circuit-level implementation, and experimental characterization results. Our measurement results show an amplification voltage gain of 48.3 dB, a bandwidth of 300 Hz, rail-to-rail input DC offset tolerance, and 41.5 dB artifact suppression, while consuming 55 <inline-formula><tex-math notation="LaTeX">$\mu$</tex-math></inline-formula>W per channel. The system's efficacy in EEG motion artifact suppression is validated experimentally, and system- and circuit-level features and performance metrics of the presented design are compared with the state of the art.

quick setup time and comfortable use, rigid/flexible dry (i.e., gel-free) contact or non-contact electrodes are utilized in these devices, which comes at the cost of having a significantly higher and more variable interface impedance due to the less-stable electrode-skin connection.The impedance variations result in fairly-large fluctuations in the signal's magnitude and DC level, commonly known as motion artifacts [7], [8].Since any physical activity of the patient (e.g., talking, chewing, etc.) could cause electrode movements, hence impedance variation, motion artifacts are considered random in nature both in terms of occurrence rate and severity.
As shown in Fig. 1(a), conventionally various digital signal processing (DSP) pattern recognition algorithms have been used to extract motion artifacts in recorded bio-signal (e.g., electrocardiography (ECG)) recordings.These techniques primarily rely on pattern recognition algorithms to detect and remove artifacts from the recorded bio-signal.One of the most common approaches used is the independent component analysis (ICA), which is a blind source separation technique that decomposes the bio-signals into statistically independent components.By identifying and discarding components associated with artifacts, ICA effectively suppresses unwanted noise [9].The next approach is the wavelet-based methods which decompose the bio-signals into multiple frequency bands, enabling the selective removal of artifact-related components [10].Adaptive filters are the other common approach that are designed to eliminate artifacts by dynamically adjusting their coefficients based on the input signal [11].However, these DSP-based methods are more suited for ECG signal and face several limitations for removing motion artifacts in EEG signals [12], [13], [14].The main reason is that, unlike ECG signals, EEG signals do not have a distinct, repetitive pattern, making it challenging for conventional DSP algorithms to accurately distinguish between artifacts and actual EEG signals.Additionally, the significant amplitude differences between artifacts (∼100 mV) and EEG signals (∼10-100 μV) require high-dynamic-range recording circuits, resulting in power-hungry solutions.Furthermore, DSP techniques can distort or remove underlying EEG activity, be computationally intensive, and introduce latency due to complexity, making them less suitable for portable, low-power EEG systems [15], [16].Moreover, their performance often relies on proper parameter tuning, which may require expert knowledge or calibration with clean reference data, limiting applicability in real-world scenarios.
Authorized licensed use limited to the terms of the applicable license agreement with IEEE.Restrictions apply.Fig. 1(b) shows a popular alternative approach, in which highfrequency (out of EEG band) current pulses are injected to the skin and the resulted voltage is recorded through a parallel path to measure the interface impedance, which is used to estimate the real-time magnitude of motion artifacts.The estimated artifact is then subtracted from the amplifier's input to significantly reduce its dynamic range.To prevent any risk of instability and signal distortion, the overall latency of the feedback loop has to be made strictly small, which comes at the cost of limiting the estimator's complexity, hence its accuracy [5].Poor artifact estimation leads to subtraction residues that are larger than the actual EEG signal (i.e., signal drown in noise).Therefore, while the amplifier saturation is avoided, the EEG activity is lost.The estimation accuracy also depends on the resolution and speed of the digital-to-analog converter (DAC) that converts the estimated artifact back to the analog domain to be subtracted from the input signal.Typically, power constraints prevent from employing a high-resolution high-speed DAC (e.g., digital signal processing and 12-bits DACs require 54 μW for 3-channel ECG recording [5]).
In this work, we first study the electrode-skin interface electrical characteristics for dry non-contact electrodes in the absence and presence of motions through various experimental measurements.Based on the results of this study, we then present a new recording front-end architecture, (Fig. 1(c)) with a dual signal path: an upper path uniquely designed to generate an output voltage that is proportional to the real-time motions' magnitude (MoMa), and a lower path that is a signal amplifier with a gain that is proportional to MoMa.As shown in Fig. 1(c), the proposed architecture also has a second amplification stage with a gain that is set by the upper path's output to be inversely proportional to motions' magnitude (i.e., k/MoMa).The two cascaded amplifiers yield an overall constant gain that is independent of motions magnitude.
The most important advantages of the presented idea are: 1) It is implemented in-channel, which is particularly beneficial for EEG recording, where the electrodes are physically distant from each other (compared to intra-cranial EEG (iEEG)) and are typically connected to a central processing unit through long wires.As such, it is preferred to quantize the recorded EEG signals at the electrode site before sending them to the central unit to prevent signal-to-noise ratio (SNR) degradation due to noise/interference.By conducting artifact detection and removal in-channel, the required input dynamic range (DR) for the analog-to-digital converter (ADC) reduces from 80-90 dB (i.e., EEG + artifact) to 50-60 dB (i.e., cleaned EEG), which significantly reduces power consumption.Additionally, it makes each recording channel a stand-alone unit and needless of a backend processing unit for its operation, hence improves channel count scalability and reduces the number of interconnecting wires.
2) The motion artifact extraction and removal are both done in the analog domain, making the proposed method's efficacy needless of high-resolution high-DR high-speed ADCs and DACs used for digitizing the motion-contaminated signals and converting artifact estimation back into the analog domain, respectively (i.e., as in method shown in Fig. 1(b)).Instead, the proposed method converts the slowly-varying low-DR MoMa to pulse widths that are later used to remove the impact of artifacts from the amplification gain.This conversion requires significantly lower speed and dynamic range, resulting in substantial further improvement in energy efficiency of the presented method compared to prior art.
3) The proposed channel architecture translates artifacts into gain modulations and then removes them by applying the exact inverse gain.This makes the method's efficacy independent of the artifact pattern or severity, unlike the DSP-based methods that use pattern recognition algorithms to detect and remove artifacts.
This article extends on an earlier report of the principle and demonstration in [18], and offers (a) theoretical and experimental characterizing of the electrode-skin interface, (b) a more detailed analysis of the proposed architecture and its circuit-level implementation, and (c) additional system-and circuit-level experimental measurement results.
The rest of the article is organized as follows.In Section II, using an experimental statistical approach, we will investigate the effect of various electrode movements on the electrode-skin interface impedance.Section III defines signal-correlated anduncorrelated artifacts and analytically describes how they appear at the output of charge and voltage amplifiers, which will be the basis of artifact extraction by the proposed recording front-end  architecture presented in Section IV.Section V discusses the circuit-level implementation of the full recording channel, which includes circuits for motions extraction and removal, as well as band-pass filtering stages.Section VI presents the electrical and experimental measurement results and compares this work with the state of the art.Section VII concludes the article.

II. INTERFACE IMPEDANCE CHARACTERIZATION
Fig. 2 shows a commonly-used electrical circuit model of the electrode-skin interface (ESI) impedance for dry non-contact electrodes [19], [20].As shown, the gap between the electrode and the skin is modeled by a capacitance, typically in the range of 1 pF-1 nF.The values of electrical elements in the ESI model depend on the insulating layer properties, the electrode physical dimensions and material, as well as the amount of pressure applied to the electrode.
We implemented a custom-designed flat dry electrode (circular, diameter: 17 mm, insulation thickness: 0.9 mil) to study the effect of various motions on the ESI impedance.Fig. 3(a shows how the measured interface capacitance varies in the presence of different random motions.To collect this data, we applied a sine waveform at a fixed frequency to the skin using one electrode and measured the resulted signal from a second electrode at a fixed distance.The measured signal was used to extract the interface capacitance between the two electrodes.During the experiment, various motions emulating different real-life physical activities and facial gestures were applied to the electrode (axial movements up to ±1 mm and planar movements up to ±5 mm) and 10,000 interface capacitance measurements were collected.Our results show an average of 59 pF and a standard deviation of 25.4 pF for the electrode-skin interface capacitance/cm 2 .Based on this experiment, and as expected, increasing the pressure applied to the electrode towards the skin result in increasing the C INSL as well as the total capacitance, and decreasing the pressure results in total capacitance reduction.

III. UNCORRELATED AND CORRELATED MOTION ARTIFACTS IN VOLTAGE AND CHARGE AMPLIFIERS
Considering the capacitive electrode-skin interface described in Section II, any electrode motion could vary the interface capacitance (C ESI ), hence, change the current flowing through it.Compared to a fixed capacitor, the current of a varying capacitor has an extra term (i.e., V C dC dt ) that is proportional to the voltage across the capacitor and the rate of capacitance variation, To investigate the impact of motions on the recorded signal, we designed a test setup with two electrodes.A 100 Hz sine wave was applied to the first electrode, while the second electrode, placed 10 cm away, was connected to the recording circuit.
During the tests, the second electrode was subjected to a specific set of planar and axial motions.It should be noted that we repeated these experiments multiple times (>10) and observed similar outcomes, consistent with our simulation results and theoretical analysis.The recording was conducted once using a conventional capacitive-feedback voltage amplifier (Fig. 4 where v EEG is the EEG signal, V elec is the recording electrode's DC potential, and V skin is the skin's DC potential.This results in the input current to be Authorized licensed use limited to the terms of the applicable license agreement with IEEE.Restrictions apply. Since the amplifier's input is AC coupled, there is no DC path to control V elec .Therefore, its difference with V skin (i.e., V elec − V skin ) could take a wide range of values (i.e., a few mV to >100 mV).As a result, (V elec − V skin ) dt .When this large current is integrated on the feedback capacitor C F , it results in a sizable artifact at the output of the amplifier, as shown in Fig. 4(c).It should be noted that this artifact is of random nature due to the unpredictability of the interface capacitance variations and lack of control on the electrode potential (V elec ).Recording μV-level EEG signals in the presence of such large artifacts requires boosting the input DR from 10 μV-1 mV range to 10 μV-200 mV (i.e., an increase of ∼46 dB), which translates into a proportional increase in power consumption.Additionally, even if the high DR is somehow achieved, the unpredictability of the artifacts makes it a highly challenging signal processing task to separate them from the EEG signals.Considering that the interface capacitance variations (i.e., dC ESI dt ) are unavoidable in wearable devices, the only alternative for removing these artifacts is to take control of the DC voltage across C ESI (i.e., V C ESI −DC = V skin − V elec ), and ideally set it to zero.Fig. 4(b) shows how the voltage amplifier of Fig. 4(a) is turned into a charge amplifier by removing C IN and directly connecting the electrode to the inverting terminal of the OTA, which allows for direct control of V elec .Using this control, V C ESI −DC could be minimized by setting V elec = V skin .Even if they are not perfectly equal down to the μV level, the difference could be made small enough to reduce the signal's dynamic range by orders of magnitude and completely remove the above-mentioned risk of amplifier saturation during motion artifacts.Fig. 4(d) shows the measurement results confirming that when the dt , which gets integrated on the feedback capacitor and generates a v out = This results in a voltage gain (C ESI /C F ) that is linearly proportional to the value of the varying C ESI .Therefore, C ESI variations caused by random motions translate into linear modulation of the output signal's amplitude, which we call motion-modulated EEG (MM-EEG).This is a great improvement compared to the previous situation (Fig. 4(c)), in which motions resulted in large random-shaped artifacts on the output signal.For more clarification, the purple line in the figure indicates the voltage resulting from the term (V elec − V skin ) dC ESI dt , which is responsible for EEG-uncorrelated artifacts at the output.This purple trace demonstrates the significant impact of this term on the voltage amplifier (i.e., large fluctuations in Fig. 4(c)), and how the charge amplifier effectively removes it (i.e., the nearly flat purple trace in Fig. 4(d)).
The above discussion suggests that if we have knowledge of the real-time value of motions magnitude (MoMa), we could use that to demodulate the MM-EEG and achieve clean EEG signals at the output.The theoretical analysis and circuit implementation of this idea, which is the core of our proposed architecture, are presented in the next sections.

IV. DUAL-PATH ANALOG FRONT-END FOR MOTION ARTIFACT EXTRACTION
As discussed in Section I, the proposed recording front-end architecture has two parallel paths.As such, a custom-designed interdigitated electrode (similar to what we have previously reported in [4]) is employed.The symmetry and inter-digitation of this particular electrode design ensures perfect matching of the electrode-skin interface (e.g., C ESI ) characteristics for the two paths.We will show experimental results proving this matching later in this article.As shown in Fig. 5, the two sections of the electrode are connected to two identical charge amplifiers, each similar to the circuit discussed in Fig. 4(b).The only difference between the two paths is that the voltage at the OTA's non-inverting input is set to V SKIN for the lower path (LP), and V SKIN + V CT RL for the upper path (UP).This results in V C ESI −DC = 0 for the lower path, and V C ESI −DC = V CT RL for the upper path.Considering that the ac part of the V C ESI for both paths is the EEG signal (v EEG ), using (1), the input current through the C ESI can be written as The integration of I IN on the feedback capacitance defines the output voltage of the two paths.Given that the amplitude of the EEG signal is lower than 1 mV, by setting the V CT RL to be much larger than the maximum magnitude of the v EEG (e.g., >50 mV), the integration of the first and the second terms of the UP's I IN (i.e., (C ESI dv EEG dt Therefore, the output voltages of the two paths can be written as, Ignoring V SKIN (a DC term that will be removed in the subsequent amplification), LP's output is the MM-EEG described in Section III, in which the v EEG is amplified by a factor of 1/C F and modulated by the variable C ESI .Ideally, if we can extract the real-time value of C ESI from the UP's output, then the LP's output could be multiplied by k/C ESI to achieve a clean EEG (k being a constant).However, the UP's output has ΔC ESI term instead of C ESI .Fig. 6(a) shows a modified version of UP circuit, in which the feedback resistor is replaced with a switch, which results in C ESI (instead of ΔC ESI ) to appear at the UP's output.As shown in Fig. 6(b), during φ 1 , the non-inverting input of the OTA is set to V SKIN and the switch S 1 is closed to make the inverting input also equal to V SKIN .During φ 2 , S 1 is opened, and the non-inverting input terminal is raised to V CT RL + V SKIN .Therefore, a charge of V CT RL × C ESI is transferred to the feedback capacitor, resulting in where V CT RL and V SKIN are known DC voltages (hence, can be removed in a subsequent stage, as described in the next section) and the third term is proportional to the absolute value of C ESI .
Having C ESI extracted, we can now compensate for the motion artifacts in real time by cascading a 2nd-stage amplifier to the first stage's LP, and setting its gain proportional to 1/C ESI to render a C ESI -independent overall gain.This frequency is chosen to be well-above the EEG signal to be able to compensate the motion artifact signal in real-time and with good resolution (>10-bit).the PWM block generates pulses with a duty cycle proportional to the amplitude of the first stage's UP output.As shown, the sum of the input current I R1 and the feedback current I R2 is integrated on the feedback capacitor.The polarity of the resulting voltage decides the output of the comparator in the next clock cycle.I R2 itself is set based on the comparator's decision on the previous input sample (i.e., for D = 0).As the comparator output is reset in each clock period, a D-type flip flop (DFF) is used after the comparator to prevent the propagation of this reset event to the next stage.The DFF clock is delayed by 100 ns with respect to the comparator clock (10% of the clock cycle), which allows enough time for the comparator to make a decision.
In addition to the negative feedback of the OTA which sets its inverting and non-inverting inputs at V set , the negative feedback formed by the continuous-time ΔΣ loop sets the two inputs of the comparator approximately equal.The 1-bit DAC is implemented with an NMOS ( 20×250n 250n ) and a PMOS ( 30×250n 250n ) that are connected to V P 1 and V P 2 , respectively.V P 1 and V P 2 are set to the minimum and maximum voltages of the first stage's UP output.Therefore, when PWM output (D) is zero, the DAC's output is V P 2 and when PWM output is VDD, the DAC's output is V P 1 .Considering that the current through the feedback elements is negligible (voltages at both terminals of these components are equal to V set ), nodal analysis at the inverting input of the OTA where R 1 = R 2 , results in ( 7) that shows the relationship between the duty cycle of PWM output (D) and its input voltage.
As it was shown in section III, the first stage's UP output has a term that is proportional to C ESI (i.e., V CT RL C ESI C F ), as well as unwanted DC terms (i.e., V CT RL + V SKIN ).To remove the DC terms, V set is chosen in a way that 2V set − V P 2 is equal to V CT RL + V SKIN .Replacing these two terms in (7), the duty cycle will be where α is constant, thus D is linearly proportional to C ESI .We used this PWM signal to set the gain of the PGA proportional to 1/C ESI , thus removing C ESI from the overall gain.
As shown in Fig. 7(c), the PGA's feedback path is formed by a resistor in series with a switch S 2 .The two form a cycled resistor with an equivalent resistance of R/D, where D is the duty cycle of the control pulse of the switch [21].Therefore, by using the PWM signal to control the cycled resistor's switch, the PGA's gain will be Authorized licensed use limited to the terms of the applicable license agreement with IEEE.Restrictions apply.Multiplying this by the first stage's LP gain (as they are cascaded) results in an overall channel gain that is independent of C ESI , hence, remains constant during motions, To filter the high-frequency switching noise of the cycledresistor, a feedback capacitor (C F P GA ) is placed in parallel with the switched resistor.The upper cut-off frequency of this structure is equal to . Accordingly, the C F P GA is chosen in a way that for any reasonable D (i.e., D > 0.01), the cut-off frequency of the PGA is greater than the EEG bandwidth in order to prevent any unintended attenuation of the EEG signal.Fig. 7(d) shows the circuit schematic of the employed wide-swing folded cascode OpAmp in the PGA block and the strong-arm comparator used in the PWM block.
Fig. 8(a) shows the top-level block diagram of the presented IC, which includes 8 EEG-recording and one reference channels.As shown, the two-stage front-end circuit described in previous sections is followed by a fully-differential two-stage bandpass filter that is employed in each channel to further suppress the  high-frequency switching noise generated by the PGA's feedback path.The output of the PGA from the reference channel is fed to this filter in each recording channel.Fig. 8(b) shows the detailed schematic of the two-stage filter.The figure also depicts the circuit schematic of the employed differential folded cascode OTA and its common-mode feedback (CMFB) circuit, both used in the bandpass filter.

VI. EXPERIMENTAL MEASUREMENT RESULT
The described 8-channel EEG recording IC was designed and fabricated in a 130 nm standard CMOS technology.The micrograph of the 3×4 mm 2 integrated circuit is shown in Fig. 9.Each recording channel is highlighted and the channel dimensions are annotated.
The presented channel's experimental measurement results show a gain of 48.3 dB (3 dB bandwidth:300 Hz) and inputreferred noise power spectral density of 187 nV/ √ Hz (measured at 100 Hz), which is in the same order as the noise generated by the non-contact electrode-tissue interface [19].Fig. 10 shows the measured capacitance from the motion artifact extraction path (i.e., first stage's UP) plotted versus the capacitance calculated based on the measured gain variations in the EEG recording path (i.e., first stage's LP).It must be mentioned that the measured signals used for capacitance extraction were collected while subjecting the electrode to various planar and axial movements.The strong correlation between the capacitance values extracted from the UP and the LP's measured outputs not only validates the artifact estimation accuracy, but also demonstrates the accuracy of the motion artifact detection path (i.e., UP) in measuring the actual value of the interface capacitance, as opposed to just its variations.
Fig. 11 shows the experimental measurement results validating the efficacy of the PWM and PGA blocks in conducting artifact removal.For this test, a motion-affected signal (a 300 Hz sine wave modulated with a 20 Hz signal) is fed to the PGA, and its gain is controlled by the output of the ΔΣ-PWM block.By demodulating the input signal, the PGA extracts the clean sinusoidal signal from the mix.The linearity of the PWM block, defined as the ratio of pulse width to input voltage, is essential for effectively removing motion artifacts.Attaining excellent linearity is the main motivation for using a delta-sigma-based structure for the PWM, rather than conventional varactor-based designs.This choice ensures accurate removal of motion artifacts without introducing additional distortions or inaccuracies to the signal.Furthermore, the use of the PWM signal in the switched-resistor-based variable gain enables continuous realtime gain control, unlike the structures that uses resistive or capacitive DAC.To further test the performance of the ΔΣ-PWM experimentally, it was fed with an arbitrary input voltage with a range of ±50 mV (i.e., the full scale range of MoMa (UP's output)) and its output was used to control the PGA's gain.As presented in Fig. 13, our measurement results show that through controlling   the PGA's gain, the ΔΣ-PWM block can remove an arbitrary motion signal added to the input EEG with less than 1% error.
One of the known drawbacks of using dry electrodes with large ESI impedance is the common-mode rejection ratio (CMRR) degradation due to the considerable mismatch between the input capacitances of different channels.As shown in Fig. 14, in order improve the CMRR, a feedback loop, similar to the driven right leg (DRL) loop used in ECG recording, is employed.In this circuit, output voltages of all channels are averaged using a passive structure, and the average is amplified and fed back to the body through an additional electrode.As illustrated in Fig. 15, our measurement results show that activating the DRL loop attenuates the powerline noise by >36 dB.
Additionally, the described adaptive PWM-based gain control, which was primarily designed to remove motion artifacts, is leveraged to further enhance the CMRR.Fig. 16 shows the Authorized licensed use limited to the terms of the applicable license agreement with IEEE.Restrictions apply.measured CMRR of two channels with and without dynamic gain control.In this experiment, the input capacitance of the two paths of the recording front-end (UP and LP) are set to 10 pF for channel1 and 11 pF for channel 2 (i.e., an intentional 10% mismatch).An 11.33 dB (at 60 Hz) CMRR improvement is measured when the PWM-based dynamic gain control in the artifact removal block is utilized to improve common-mode rejection.
The effect of DC offset between the ideal value set by the DRL loop and the actual skin potential (i.e., V elec − V skin ) is evaluated by monitoring the magnitude of motion artifacts on the recorded signal when there is a 100 mV, 10 mV, 1 mV or zero DC voltage difference across the electrode-tissue interface capacitance (C ESI ).We conducted surface EEG recording experiments under various electrode motions when different values for V elec − V skin were applied.We expected the recorded signals to contain three components: (i) pure EEG signals, (ii) EEG-correlated artifacts in the form of linear gain modulations (similar to artifacts shown in Fig. 4(d)) and (iii) EEGuncorrelated artifacts due to the intentional DC bias difference between the electrode and the skin (similar to artifacts shown in Fig. 4(c)).Next, the effect of the EEG-correlated artifacts were removed using the strategy presented in Section V.As a result, the remaining artifacts on the signal are of the EEG-uncorrelated type, which are associated with the magnitude of V elec − V skin , as was discussed in Section III.The resulted signal is plotted in Fig. 17, illustrating the impact of different DC offset magnitudes on the quality of EEG recording.As shown in this Figure , for large DC voltage differences, the C ESI variations cause large EEG-uncorrelated artifacts on the recorded signal, which makes EEG signal recovery practically impossible.However, with the proper skin biasing through the DRL loop, this DC difference is made sufficiently small (i.e., <1 mV), resulting in uncorrelated artifacts that are small enough not to affect the efficacy of the presented architecture for correlated motion artifact removal, or the required DR for the recording circuit.
We also used pre-recorded EEG signals (CHB MIT Scalp EEG Database [27]) and contaminated them with motion artifacts that were experimentally measured.The signal contamination was performed by applying the interface capacitance variations (extracted, using 6, from measured motion artifacts) to 5 (LP) to generate the output of the EEG recording path when it experiences the same motion.We then fed the motioncontaminated EEG and the measured motion artifacts into the recording path and the PWM block, respectively, using synced arbitrary waveform generators.Comparing the recorded signals without (Fig. 18(a)) and with (Fig. 18(b)) the motion artifact removal activated, it is evident that the artifacts are suppressed significantly using the presented architecture.It should be noted that since the recording is performed with the presented architecture and with V skin set exactly equal to V elec , all EEG-uncorrelated artifacts are blocked by the front-end and the artifacts appearing in Fig. 18(a) are in the form of gain modulation, which are detected and removed by the circuit, once the artifact removal is activated as shown in Fig. 18(b).
Table I compares this work with the state of the art wearable bio-signal recording microsystems in terms of system-level and  circuit-level performance and features.The red indicates the main disadvantage of each reference, and the green indicates the main advantage points of the presented work.The presented work is the only design that offers both detection and removal of motion artifacts in-channel and on-chip.In addition, the in-channel ADC-free implementation makes the design needless of a central backend signal processing unit, hence further relaxes the overall system complexity and improves its channel-count scalability.Moreover, since the proposed method for artifact detection is needless of a current injection at an out-of-band frequency (typically, 1 kHz [5], [8]), it yields a higher accuracy in extracting the real-time interface impedance, and consumes the lowest power per channel among works that feature artifact extraction.

VII. CONCLUSION
In this article, we first experimentally characterized the electrode-tissue interface impedance variations of dry EEG electrodes in the presence of random physical movements.The characterization results were used to explain how motion artifacts are manifested in the EEG recording when conventional analog front-end architectures are used.Based on the acquired knowledge, we proposed, analyzed, developed, and experimentally tested an analog dual-path feed-forward architecture for EEG recording and simultaneous in-channel motion artifact extraction and removal.Compared to the state-of-the-art, the proposed front-end is needless of any digital signal processing and any tissue current injection for interface impedance estimation.This has resulted in improving energy efficiency, size, and complexity of the solution by avoiding power hungry high-DR data converters and auxiliary current stimulators, as well as minimizing the number of connections between electrodes and central processing unit.A 12 mm 2 IC was fabricated in a 130 nm CMOS technology, integrating 8 channels of the presented architecture for EEG recording.The design analysis and the VLSI circuit implementation are described in details and system-and circuit-level experimental characterization results are reported.The presented measurement results confirm a voltage gain of 48.3 dB, a bandwidth of up to 300 Hz, rail-to-rail input DC offset tolerance, and 41.5 dB artifact suppression while consuming 55 μW per channel.

Fig. 1 .
Fig. 1.Simplified block diagram of conventional methods used for motion artifact removal using (a) pattern recognition and (b) impedance-based artifact estimation.(c) Top-level block diagram of the proposed in-channel analog method for motion artifact extraction and removal.

Fig. 3 .
Fig. 3. (a) Experimentally measured admittance/cm 2 magnitude and phase of the electrode-tissue interface for a custom-designed dry non-contact electrode.(b) Experimental results of 10,000 interface capacitance/cm 2 measurements of the non-contact electrode in the presence of various types of motions.
Fig.2shows a commonly-used electrical circuit model of the electrode-skin interface (ESI) impedance for dry non-contact electrodes[19],[20].As shown, the gap between the electrode and the skin is modeled by a capacitance, typically in the range of 1 pF-1 nF.The values of electrical elements in the ESI model depend on the insulating layer properties, the electrode physical dimensions and material, as well as the amount of pressure applied to the electrode.We implemented a custom-designed flat dry electrode (circular, diameter: 17 mm, insulation thickness: 0.9 mil) to study the effect of various motions on the ESI impedance.Fig.3(a)shows how well the experimental measurement results for the custommade electrode's ESI admittance matches the model prediction.Fitting the admittance plot to the interface model shown in Fig. 2 results in R SKIN =1 MΩ, C SKIN =10 nF, R INSL =1 GΩ, C INSL =50 pF, and C Gap =1 nF.This experiment is conducted while no relative motion is present between the electrode and (a)), and then a charge amplifier (Fig. 4(b)).Fig. 4(c) shows how C ESI variations affect the measured output of the voltage amplifier.The voltage across C ESI is

Fig. 4 .
Fig. 4. Simplified schematics of (a) an AC-coupled capacitive-feedback voltage amplifier, and (b) a charge amplifier.The impact of electrode movements on their output signal shown in (c) and (d), respectively.

Fig. 6 .
Fig. 6.(a) Modified upper path's charge amplifier to generate C ESI instead of ΔC ESI at the output, and (b) its timing and output signal during the two operating phases.

Fig. 7 .
Fig. 7. (a) Top-level block diagram of the proposed recording front-end.Circuit schematic of the (b) ΔΣ-PWM, (c) the PGA, and (d) the opamp and comparator blocks used in the proposed design.

Fig. 8 .
Fig. 8. (a) Top-level block diagram of the presented 8-channel EEG recording IC, showing the full circuit schematic of the proposed channel architecture and its connection to the reference channel.(b) Circuit schematic of the employed two-stage bandpass filter and the input-stage OTA used in its implementation.

Fig. 9 .
Fig. 9.The chip micro-graph and the layout floorplan of one of the recording channels.

Fig. 10 .
Fig. 10.Measurement result validating excellent matching between the extracted C ESI from the front-end's UP and the actual capacitance measured from the front-end's LP.The results confirm the efficacy of the proposed circuit in precise extraction of C ESI as well as the almost perfect matching of the two sections of the custom-designed inter-digitated electrode.

Fig. 11 .
Fig. 11.Measurement results showing the efficacy of the presented ΔΣ-PWM and the PGA blocks in separating the signals and artifacts at arbitrary frequencies through automatic gain control.

Fig. 12
shows the experimentally measured power spectral density of motion-contaminated and cleaned signals, confirming the efficacy of the PWM-controlled PGA in removing the extra tones due to motion artifacts without causing almost any spectral leakage or spurs, confirming the excellent linearity.The FFT plot of the motion-affected signal has a tone at 300 Hz, which represents the signal of interest, and two extra tones at 280 Hz and 320 Hz, which are f Input ± f Motion .The output FFT illustrates that the two extra tones are attenuated by >41.5 dB, effectively eliminating the motion artifacts.

Fig. 12 .
Fig. 12. Measured power spectral density of (a) the motion-modulated EEG and (b) the cleaned EEG, confirming the linearity and efficacy of the PWM+PGA in artifact removal.

Fig. 13 .
Fig.13.Measured error in removing artifacts with varying arbitrary magnitude (full-scale range) using the combination of the ΔΣ PWM and PGA.

Fig. 14 .
Fig. 14.Schematic of the circuit used for DRL loop to the body for CMRR enhancement.

Fig. 15 .
Fig. 15.Measurement result showing the 60 Hz noise attenuation before and after using the presented CMRR enhancement loop.

Fig. 16 .
Fig.16.Measurement results showing CMRR enhancement achieved by the presented dynamic gain control.Note: Neither of the two curves represent the nominal CMRR of the presented design because an intentional 10% mismatch between the capacitances of the interdigitated electrode is applied for this experiment.

Fig. 17 .
Fig. 17.Measurement results showing the impact of the magnitude of the DC voltage across C ESI on the severity of uncorrelated artifacts that appear on the recorded EEG.

Fig. 18 .
Fig. 18.Experimental evaluation of the presented architecture's efficacy in motion artifact removal using motion-contaminated pre-recorded EEG signals: (a) The artifact removal is off: motion artifacts appear frequently and cause large nonlinear time-varying changes in the recording voltage gain.(b) The artifact removal is on: gain variations are almost completely compensated by the proposed circuit and no significant distortion is observed.

TABLE I COMPARISON
TO THE STATE OF THE ART