IEEEtran_Hybrid_ALU_preprint.pdf (1.1 MB)
Download fileAn Advanced 1-bit Arithmetic Logic Unit (ALU) with Hybrid Memristor-CMOS Architecture
preprint
posted on 2021-09-10, 20:07 authored by Muhammad Farhan AzmineMuhammad Farhan Azmine, Urmi Debnath, Yeasir ArafatMemristor is dubbed as the fourth fundamental electrical component which works primarily as a non-volatile memory element. Memristors can also be used to construct logic gates, and Memristor Ratioed Logic (MRL) is one of these structures. The higher area efficiency and CMOS architecture compatibility of MRL gates have lead researchers to pay attention to its use in digital logic architecture. In this work, binary MRL is integrated with Complementary Metal-Oxide Semiconductor(CMOS) logic elements to develop building blocks of an Arithmetic Logic Unit (ALU). The proposed 1-bit ALU is simulated using LTSpice, which allows the versatility of changing the parameters as per the model used. This work designs and analyses an optimized cascadable 1-bit ALU with with voltage level based binary logic state via simulation. The proposed circuit shows improvement in transistor count and delay over benchmark circuits.
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Email Address of Submitting Author
azmine45@gmail.comORCID of Submitting Author
0000-0001-9672-3251Submitting Author's Institution
Bangladesh University of Engineering & Technology (BUET)Submitting Author's Country
- Bangladesh