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Compact FPGA Ring Oscillator Physical Unclonable Functions Circuits Based on Intertwined Programmable Delay Paths.pdf (1.17 MB)

Compact FPGA Ring Oscillator Physical Unclonable Functions Circuits Based on Intertwined Programmable Delay Paths

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posted on 02.08.2021, 22:07 by Yangpingqing HuYangpingqing Hu, Yuqiu Jiang, Weizhong Wang
Compact FPGA based PUF extraction circuits based on intertwined programmable delay paths implemented on Xilinx FPGA.

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Email Address of Submitting Author

hu3@uwm.edu

Submitting Author's Institution

University of Wisconsin, Milwaukee

Submitting Author's Country

United States of America