RFIC.pdf (1.42 MB)

Design Project Using 45nm CMOS

Download (1.42 MB)
posted on 2022-01-13, 14:37 authored by Jerry JingJerry Jing

this article is aimed to design two impedances matching network to let the source degeneration and common gate amplifier to achieve the ideal characteristic. In the source degeneration case as the resistance is so small, so we just use down converting matching network. As the source degeneration gives us a high resistance , we just match with a up converting network.


Email Address of Submitting Author

Submitting Author's Institution

San Jose State Univerisity

Submitting Author's Country

  • United States of America

Usage metrics