Efficient Integrated Transformer–Inductor With High PCB Utilization and Optimized Core

This article addresses the challenges associated with the high winding and core loss in the integrated transformer–inductor (ITL). To overcome these challenges, we propose an improved winding design of the ITL by utilizing idle shielding layers for inductor integration within the matrix transformer. This method offers full printed circuit board utilization, where all the layers are consumed as winding, significantly reducing the winding loss of the ITL. Moreover, we propose an improved core structure of the ITL that offers better flux distribution of the leakage flux within the magnetic core. This method reduces the core loss by more than 50% compared to the conventional core structure. We demonstrate the effectiveness of our proposed concepts by presenting the ITL design used in a high-efficiency high-power-density 3-kW 400-V-to-48-V <inline-formula><tex-math notation="LaTeX">$LLC$</tex-math></inline-formula> module. The proposed converter achieves a peak efficiency of 98.7% and a power density of 1500 W/in<inline-formula><tex-math notation="LaTeX">$^{3}$</tex-math></inline-formula>.

Abstract-This article addresses the challenges associated with the high winding and core loss in the integrated transformer-inductor (ITL).To overcome these challenges, we propose an improved winding design of the ITL by utilizing idle shielding layers for inductor integration within the matrix transformer.This method offers full printed circuit board utilization, where all the layers are consumed as winding, significantly reducing the winding loss of the ITL.Moreover, we propose an improved core structure of the ITL that offers better flux distribution of the leakage flux within the magnetic core.This method reduces the core loss by more than 50% compared to the conventional core structure.We demonstrate the effectiveness of our proposed concepts by presenting the ITL design used in a high-efficiency high-power-density 3-kW 400-V-to-48-V LLC module.The proposed converter achieves a peak efficiency of 98.7% and a power density of 1500 W/in 3 .
Index Terms-Data center, high frequency, LLC converter, magnetic integration, wide bandgap, 48-V bus architecture.

I. INTRODUCTION
T HE use of cloud computing and artificial intelligence is surging rapidly.Worldwide annual spending on data center systems now exceeds $200B, with a sizable fraction spent on the physical infrastructure that provides power for the servers [1].These trends motivate to the improvement of the cost efficiency of building data centers, either by reducing initial construction costs or increasing power usage effectiveness to reduce running costs.Recently, the 48-V power architecture in data centers has attracted more interest as it can deliver higher power at higher efficiency, unlike the legacy 12-V architecture [2], [3].The 48-V bus architecture has been driven by the Open Compute Project (OCP), aiming to build an ecosystem to govern the development Ahmed Nabih was with the Bradley Department of Electrical and Computer Engineering, Virginia Tech, Blacksburg, VA 24061 USA.He is now with Texas Instruments, Inc., Dallas, TX 75243 USA (e-mail: ahmed-nabih@ti.com).
Feng Jin and Qiang Li are with the Center for Power Electronics Systems, Virginia Tech, Blacksburg, VA 24061 USA (e-mail: fengjin@vt.edu;lqvt@vt.edu).
This article has supplementary material provided by the authors and color versions of one or more figures available at https://doi.org/10.1109/TIE.2023.3294637.
Digital Object Identifier 10.1109/TIE.2023.3294637 of the server power architecture.In 2020, the OCP released the Open Rack V3 (ORV3) standard for the server power supply [4].
A narrow-range 48-V bus is proposed where the bus voltage is fixed to 50 V during normal power delivery conditions.The power supply unit (PSU) is required to fit in a low-width 1U form factor and provide peak efficiency 97.5%.This article focuses on designing the dc-dc stage of the 48-V ORV3 PSU while offering low cost, high efficiency, and high power density.The dc-dc converter is implemented using a resonant LLC converter, which offers various advantages, such as soft switching, high efficiency, and high power density.The LLC converter of the 3-kW power supply must satisfy some regulation capabilities to regulate the line-frequency ripples, provide energy during holdup time, and achieve soft startup with limited inrush current [5].
Leveraging the wide-bandgap technology and the softswitching resonant LLC converter allows one to push the switching frequency high enough to migrate from the traditional labor-intensive Litz-wire magnetics to planar printed circuit board (PCB) magnetics [6], [7].This paradigm shift provides a low-cost power supply where the assembly of all the converter components, including magnetics, is entirely automated [8].The dc-dc converter's magnetic loss (transformer loss and inductor loss) represents the high portion of the converter loss and size.Therefore, improving the magnetic structure helps improve the total performance of the dc-dc converter.The concept of the PCB-based matrix transformer [9], [10], [11] is adopted in this article as it offers a more straightforward winding implementation and lower loss than the single transformer approach.A half-bridge (HB) LLC converter is used with a matrix of two transformers connected in series, as shown in Fig. 1(a).Two full-bridge rectifiers are used to handle the high output current (60 A).The PCB-based matrix transformer can be implemented on a six-layer PCB with a UI-core, as shown in Fig. 1(b).Each leg has two primary layers forming four primary turns in series and two parallel secondary layers.The large overlap area between the interleaved PCB winding layers makes the capacitance much larger than Litz-wire magnetics.Therefore, shielding layers between the primary and secondary layers are needed, especially for the high-input voltage converters (> 100 V) to block the common-mode (CM) noise [12], [13], [14].The shielding layers are located between the primary and secondary windings to block the CM currents from primary to secondary.According to [13], the shielding winding needs to be implemented similarly to the secondary winding, as shown in Fig. 1(a), and the midpoint of the shield winding is connected to the static primary ground (GND-P).
A challenge of PCB magnetics is the low PCB utilization when electromagnetic interference (EMI) shielding is used.The shielding layers are idle (open circuit), as shown in Fig. 1(a), reducing the number of the PCB layers used as windings.For instance, a six-layer PCB with perfectly interleaved winding would have two secondary layers (layers 1 and 6), two primary layers (layers 3 and 4), and two shielding layers (layers 2 and 5).Only four layers out of the six-layer PCB are utilized as winding (66% PCB utilization).
Another challenge is the inductor implementation.The inductor requires stacking multiple PCB layers to implement a certain number of inductor turns.Unlike the transformer, the inductor winding is subject to a high leakage (or proximity) field, dramatically increasing the winding ac loss.Consequently, the PCB-based inductor suffers from high thermal stress, making the PCB inductor the hot spot of the magnetic structure and limiting the rated power of the converter.Multiple research efforts have adopted the Litz-wire winding for the resonant inductor in the 3-kW power supply dc-dc converter to avoid the high ac loss in the inductor winding [7], [15], [16].However, this approach negates the benefits of using a PCB-based transformer as it complicates the assembly and increases the cost.In [17], the inductor is implemented on the UI-core, and the winding is integrated with the transformer winding for reduced inductor loss.A similar concept was used in [3] to implement a 3-kW LLC converter and in [18] to implement a CLL resonant circuit.In [19], the matrix inductor concept is proposed, offering low PCB-based inductor loss.These previous inductor implementation methods use a considerable magnetic footprint and sacrifice the converter power density.In [20], a method is proposed to integrate the resonant inductance with the matrix transformer by rearranging the center-tap secondary windings in a five-leg core.This method creates inductance on the secondary side of the transformer and is only suitable for the center-tap secondary winding.In [21], the resonant inductance is integrated within the matrix transformer by creating unbalance (changing the turn ratio) between the two elemental transformers and adding a center leg to the UI to confine the inductor flux (becomes an EI-core).Methods in [20] and [21] offer high power density integration; however, they compromise the transformer efficiency with a significant increase in the winding and core loss.Recent published work on the integrated transformer-inductor (ITL) [22] attempts to improve the ITL from an optimization point of view, while the fundamental magnetic structure is still similar to the original work by Li et al. [21].Furthermore, the previously published work regarding the ITL only deals with primary and secondary windings of the transformer and does not discuss the EMI performance of the magnetic structure.
This article simultaneously addresses the challenges of the ITL increased loss and the EMI noise.The main contributions of this article are summarized as follows.
1) This article proposes an improved winding design of the ITL by utilizing the idle shielding layers as part of the primary winding.The proposed winding structure offers 100% utilization of the PCB and significantly reduces the winding loss of the ITL while reducing the EMI noise simultaneously.2) This article proposes an enhanced EEI-core structure of the ITL, which offers better flux distribution of the leakage flux within the magnetic core.The proposed EEIcore reduces the core loss to < 50% of the conventional approach using the original EI-core.Finally, the fundamental improvements proposed for the winding and the core of the ITL, along with the proper optimization of the magnetic structure, have led to a high-efficiency high-power-density 3-kW LLC module.The proposed converter offers an excellent power density of 1.5 kW/in 3 and a peak efficiency of 98.7% that outperforms state-of-the-art designs.A comparison to the state-of-the-art solutions has been presented in Section V in Fig. 25 to ascertain the novelty of the proposed work.

II. CONCEPT AND LIMITATIONS OF THE ITL
The LLC converter of the data center power supply requires regulation capabilities to meet the holdup time requirements, achieve soft startup, and regulate line-frequency ripples.However, the transformer shown in Fig. 1(b) represents a standard transformer with minimal leakage inductance.Such a transformer is insufficient for a regulated LLC converter.A resonant inductance is required to attain gain regulation capabilities.

A. Concept of ITL
Integrating controllable leakage inductance with the matrix transformer was proposed in [21] by unbalancing (or changing the turn ratio of) the two elemental transformers T 1 and T 2 and adding an auxiliary center leg to the UI-core to confine the inductor flux.Unbalancing both primary and secondary turns' number created resonant inductances on both the primary and secondary sides, which is suitable for the CLLC resonant converter of the electric vehicle chargers.Only resonant inductance on the primary side is needed in the LLC converter of the data center power supply.Therefore, only the primary turns are unbalanced between the two elemental transformers.The circuit diagram of the LLC with the ITL is shown in Fig. 2(a), and the magnetic structure of the ITL is shown in Fig. 2(b).The two elemental transformers are unbalanced by unbalancing the number of primary turns on each transformer.The secondary winding is the same as in the original standard transformer shown previously in Fig. 1.The two secondary turns are distributed and connected in series between T 1 and T 2 .By unbalancing the number of primary turns between the two transformers and adding an auxiliary leg, the coupling between the primary winding in one transformer and the secondary winding in the other transformer is reduced.This process reduces the final coupling between the primary and secondary.
The mutual flux φ m and leakage flux φ k can be calculated using the ITL's reluctance model shown in Fig. 3(a).Consequently, the magnetizing inductance L m and the leakage (resonant) inductance L r are calculated as follows: where R is the reluctance of the transformer legs (legs 1 and 2), and R a is the reluctance of the auxiliary leg.n 1 and n 2 are the number of primary turns on T 1 and T 2 , respectively.L n is the ratio between magnetizing and resonant inductances.More details on the reluctnace model and the flux and inductance derivation can be found in Appendix-I in the supplementary files.From (2), the magnetizing inductance is only controlled by the transformer leg reluctance R and only a function in the total primary turns (n 1 + n 2 ).On the other hand, from (2), the resonant inductance is governed using the auxiliary leg reluctance R a and is a function in the amount of unbalance between the two transformers (n 1 − n 2 ).Equation (3) shows the L n value, which depends on the ratio of auxiliary leg reluctance to transformer leg reluctance.For given n 1 and n 2 , the minimum L n (or maximum L r ) can be achieved by minimizing R a , which is achieved by making the air gap of the auxiliary leg equal zero (l g a = 0).A zero air gap on the auxiliary leg makes the reluctance R a = 0 (assuming negligible ferrite reluctance).The minimum L n can then be calculated as follows: Fig. 3(b) shows the relation between the minimum achievable L n and the distribution of the number of primary turns between the two transformers.The greater the unbalance in primary turns between the two transformers (n 1 − n 2 ), the lower the minimum L n (higher resonant inductance) can be.Note that the calculated inductance from the reluctance model only accounts for the forced inductance created by the leakage flux in the core.There is also the stray inductance of the PCB traces, which is eventually added to L r in (2).To meet the regulation requirement, L n of approximately 15 is desired [19].Therefore, n 1 = 5 and n 2 = are chosen, which achieve a minimum L n = 16 with zero air gap in the auxiliary leg.For the design example shown in Fig. 2, T has a 5:1 turn ratio, and T 2 has a 3:1 turn ratio.

B. Limitations of ITL
The previous discussion was on the concept of the ITL and the quantification of the inductance parameters.However, the design shown in Fig. 2 has multiple drawbacks and expected much higher loss than the standard transformer in Fig. 1.A comparison of the magnetic loss between the standard transformer and the ITL is performed to emphasize the increased losses incurred by the ITL.The standard transformer and the ITL are simulated using Maxwell FEA to quantify the losses in both the magnetic structures.The two magnetic structures are simulated at the same winding width and core cross-sectional area A e .The standard transformer uses a UI-core, while the ITL uses an EI-core, as shown in Fig. 4(a).The winding loss and the inductance are quantified and compared using 2-D FEA simulation with an eddy solver.The primary and secondary windings are excited using sinusoidal current representing the fundamental approximation of the time-domain transformer currents.The excitation values are: primary current I p = 24.5∠−9.5 • , reflected secondary current I s /n = 24.2∠0,f = 300 kHz, and initial mesh length = skin depth.Moreover, the core losses are quantified and compare 3-D FEA simulation with a transient solver to account for the sinusoidal leakage and triangular mutual flux in the ITL core.The FEA simulation uses the time-domain current excitation of the primary and secondary windings.The algebraic difference between time-domain waveforms of the primary I p and secondary I s /n currents results in the triangular magnetizing current and triangular mutual flux.The mesh length of the core in the FEA simulation is set to 2 mm.The core material is DMR96A, whose parameters are listed in Table I.C m , α, and β are the Steinmetz coefficients.μ r is the relative permeability, r is the relative permittivity, tan δ m is the magnetic loss tangent, and σ eff is the effective as conductivity.Finally, the current excitation settings, the core parameters, the mesh settings, and the FEA solver are all kept the same when comparing the standard transformer, original Authorized licensed use limited to the terms of the applicable license agreement with IEEE.Restrictions apply.are similar since the transformer legs' reluctances are kept the same (same A e and l g ).The ITL offers high leakage (resonant) inductance, unlike the standard transformer, which has a negligible leakage inductance.Nevertheless, the integration of leakage inductance comes with the price of increased magnetic loss.The winding loss of the ITL is 30% higher than that of the standard transformer.This happens for two reasons: 1) the increased dc resistance of the primary layers, particularly in transformer T 1 and (2) the high proximity effect and ac loss due to the nonperfect interleaving between layers after unbalancing the winding in the ITL.The core loss in the ITL exhibits a significant increase, almost five times higher than that of the standard transformer, due to the high concentration of the leakage flux that increases the flux density.

III. REDUCED WINDING LOSS WITH HIGH PCB UTILIZATION
As discussed in the previous section, the main concept of introducing leakage inductance within the matrix transformer is to unbalance the primary turns between T 1 and T 2 .However, this also disturbs the primary winding layout, creating more turns on transformer T 1 and increasing the winding resistance.In this structure, only four layers out of the six-layer PCB are utilized, reducing the PCB's throughput (66% utilization).

A. Half-Shield Utilization
In this section, we introduce a new winding structure that simultaneously allows for inductor integration and greater PCB utilization by leveraging the unused or idle shield layers.In the HB LLC converter shown earlier in Fig. 1(a), the primary winding terminal is connected to the HB's bottom terminal (GND-P).Since the shield winding is already connected to GND-P from the middle point between the two shielding turns, the shield turn Sh 1 can be utilized as the first turn of the primary winding.The bottom terminal of Sh 1 is connected to GND-P, and the top terminal of Sh 1 is connected to the original primary winding, as shown in Fig. 5(a).The shield turn Sh 1 (active shield) is now considered a primary turn.
The turn Sh 1 is galvanically connected to the primary winding on T 2 but is considered magnetically in series with the primary winding on T 1 .Sh 1 turn is winded on leg 1 of T 1 and has the same induced voltage as the primary winding turns on T 1 .Therefore, Authorized licensed use limited to the terms of the applicable license agreement with IEEE.Restrictions apply.the Sh 1 turn is considered an additional primary turn on T 1 .The active shield turn Sh 1 can create the unbalance required in transformer T 1 without adding extra primary turns unlike in the original ITL.Therefore, with this proposed winding structure, the primary turns on T 1 are kept to four turns as compared to the original winding shown in Fig. 2 with five turns on T1.The small number of primary winding turns in T1 reduces the dc resistance of the primary winding, which consequently reduces the current density and the loss.After using Sh 1 turn, the proposed winding layout increases the throughput of the PCB winding with 83% PCB utilization compared to 66% in the original ITL in Fig. 2. Fig. 6 shows the improvement in the current density of T 1 winding with the proposed ITL (right) with half-shield utilization compared to the original ITL (left).
Notice that the total number of turns on T 1 (5:1) and T 2 (3:1) in the proposed winding is kept the same as the number of turns in the original ITL in Fig. 2. Therefore, the magnetizing and leakage inductance created with the proposed winding is the same as in the original ITL.Moreover, the voltage on the shield turn Sh 1 in the proposed winding is the same as in the original ITL circuit.Therefore, the shield in the proposed ITL with halfshield utilization has the same effectiveness in blocking the CM current.

B. Full-Shield Utilization
Further improvement in the winding loss can be achieved by increasing the PCB layer utilization even further.Here, we propose ITL with 100% PCB utilization, as shown in Fig. 7.Both the shielding turns in transformers T 1 and T 2 are utilized as primary turns.This is achieved by connecting the GND-P to the negative terminal of the shield turn Sh 2 instead of the middle point between the shielding turns Sh 1 and Sh 2 .All the  shield layers are now conducting primary current and adding one extra turn to both T 1 and T 2 .The active Sh 2 turn reduces the burden on the primary winding of T 2 .T 2 has only two primary turns (green) and one shield turn Sh 2 (Orange), constituting a 3:1 turn ratio, as shown in Fig. 7(b).The reduced number of primary winding turns offered by the full-shield utilization reduces the dc resistance of the primary winding and consequently the winding loss.The proposed winding layout with full-shield utilization improves the current density distribution in T 2 , as demonstrated in Fig. 8, compared to the half-shield utilization case.
The proposed method with full-shield utilization provides 100% PCB utilization.However, the voltage potential on the CM capacitance between the shielding and the secondary layers is increased from theoretically zero to v o /2, where v o is the full secondary winding voltage excitation.This will allow some CM currents to flow from primary to secondary through the capacitance between the shield and secondary layers.However, since the voltage difference is only v o /2 = 25 V, the CM currents are insignificant compared to a transformer with no shielding, which will have CM voltage excitation 4v o .The shield is still effective in the proposed ITL with full-shield utilization since it still keeps low ac voltage excitation on the CM capacitance between the shield and secondary layers.The concept is to make the ac voltage excitation between the shield and secondary layers as low as possible and much lower than the full ac voltage on the primary winding, in order to have a significant reduction in the CM current.More details on the CM current evaluation and comparsion between the different ITL structures is found in Appendix-II in the supplementary files.The evaluation of the CM current is provided in Section V.In summary, the proposed winding design in this section helps reduce the winding loss in the ITL.The loss reduction is quantified using 2-D FEA simulation, as shown in Fig. 9.The proposed winding design with halfand full-shield utilization is compared to two benchmarks: the original ITL and the standard transformer.The proposed method with full-shield utilization can reduce the winding loss by 16%  less than the original ITL and minimizes the gap between the standard transformer and the ITL winding losses.

IV. IMPROVED CORE STRUCTURE FOR BETTER FLUX DISTRIBUTION
The core of the ITL suffers from a significant increase in loss, as discussed earlier in Fig. 4. The main reason is the high leakage flux concentration in the auxiliary leg and, consequently, high flux crowding in the core plates.The core plates in the planar magnetics represent most of the core volume and have most of the core loss.

A. Improved Core Structure Using the EEI-Core
The core loss in the ITL can be reduced by providing better flux distribution in the ITL core.In the PCB-based magnetics, the core plate has the majority of the core loss because of the larger volume compared to the core legs.Better flux distribution in the core plates can render a significant reduction in the core loss.This can be realized by increasing the channels through which the leakage flux passes.Fig. 10 shows the proposed core structure using the EEI-core for the ITL.Adding the two extra side auxiliary legs (auxiliary legs 1 and 2) to the original EI-core diverges the leakage flux from the center auxiliary leg to the side auxiliary legs.This reduces leakage flux density in the core plates and significantly reduces the core loss.A comparison is made between the original EI-core and the proposed EEI-core in Fig. 11 at the same inductance, core A e , and winding width.The proposed EEI-core shows a more even flux distribution, less flux density in the core, and less flux crowding.This translates to a 50% reduced core loss from 11.8 W in the original EI-core to 5.2 W in the proposed EEI-core.The leakage inductance using the EEI-core can be controlled with the combined reluctance of the three auxiliary legs, represented by R a in (2).

B. Impact of Air gap Location on Current Sharing
In the proposed planar ITL for the 3-kW LLC converter, parallel secondary and shielding layers are used.An even current sharing between the parallel layers is preferable to maximize the throughput of the PCB winding and achieve even loss and thermal stress.The location of the ferrite core air gap significantly impacts the proximity field distribution and, consequently, the current sharing.The technique of placing the air gap on the bottom side of the core leg and moving it away from the PCB winding has been reported in [17] and [21].Fig. 12 shows the MMF distribution on T 1 and T 2 layers.With sided air gap, the MMF stress on the parallel layers (S 1 +S 2 and S 1 '+S 2 ') is uneven, meaning that the proximity field is uneven on the parallel layers.An uneven MMF stress on the parallel layers could lead to uneven current sharing [23].Fig. 12(b) shows the simulated current sharing using 2-D FEA simulation.There is uneven current sharing between the parallel secondary winding, which confirms the hypothesis that sided air gap impairs the current sharing.
To solve such an issue, we suggest a centered air gap, as shown in Fig. 13.Moving the air gap to the center resets the MMF created by the unbalanced winding in the ITL.The result is even MMF stress on the parallel secondary windings.This is confirmed using a 2-D FEA simulation of the current sharing, as shown in Fig. 13(b).The simulation results of the centered air gap show a perfect current sharing between the parallel secondary windings.
The centered air gap presents the benefit of good current sharing between the parallel winding layers.However, the centered air gap generates a fringing field close to the winding, as shown in Fig. 14(a).The fringing field induces eddy currents in the winding, causing what is called a "fringing loss."The fringing loss depends on 1) the fringing field intensity and 2) the proximity of the fringing field to the winding.Therefore, Authorized licensed use limited to the terms of the applicable license agreement with IEEE.Restrictions apply.the fringing loss can be reduced by moving the winding away from the air gap by increasing the "clearance" in Fig. 14(a).Fig. 14(b) shows the evaluated winding loss using 2-D FEA simulation versus the normalized clearance (clearance/l g ).The fringing loss can be mitigated by making the winding-to-air gap clearance four to five times l g .

C. Optimization of the Integrated Magnetics
The final proposed LLC converter construction is shown in Fig. 15(a).The proposed winding layout with full-shield utilization is used to minimize the winding loss.The final ITL magnetic structure is shown in Fig. 15(c) using the EEI-core and the six-layer PCB.The magnetic structure is optimized to obtain the best tradeoff between the winding and core losses and achieve minimum loss at a given magnetic component footprint.Fig. 15(b) shows the optimized dimensional variables.Three variables exist for a given footprint and frequency: winding width c, core leg elongation l, and core leg edge diameter D. The optimization process sweeps l and D. c is a dependent variable that is calculated once l, D, and footprint are decided.P Loss represents the total magnetic loss of the ITL, which is the sum of the winding loss and the core loss P Loss (c, D, l) = P winding (c, D, l) + P core (c, D, l). ( The winding loss consists of the secondary, shield, and primary winding losses where I p and I s are the primary and secondary RMS transformer currents, respectively, and R AC is the ac resistance that is derived from the Dowell model [24] and compensated using the 2-D FEA.The core loss is derived analytically for optimization purposes.The core loss is calculated as follows: where i denotes the different parts of the EEI-core where the flux waveform is unique.The core is divided into seven parts: two main legs, three auxiliary legs, and two plates.P vi is the core loss density in each part of the core derived using the equivalent elliptical loop EEL method [25], which can account for irregular/arbitrary flux waveforms.Detailed formulas for the magnetic loss and the loss breakdown is found in Appendix-III in the supplementary files.The flowchart of the optimization process is shown in Fig. 15(d), which searches for the optimum dimensions [c opt , D opt , l opt ] that correspond to the minimum loss at a given footprint.The optimization program is repeated at a range of magnetic footprints to study the tradeoff between the loss and footprint.The final design point is [c opt , D opt , l opt ] = [8 mm, 6.2 mm, 12 mm], and the correspondent air gap on legs 1 and 2 is l g = 0.14 mm.Finally, the proposed improvements in this article result in an efficient integration of the transformer and the inductor compared to the conventional approach of designing a standard transformer with a separate inductor.The loss comparison between the proposed ITL and the standard transformer with a separate inductor shown in Fig. 16 demonstrates the superiority of the proposed ITL in terms of efficiency.The comparison is conducted using the same magnetic footprint for both the approaches.The dimensions of the ITL and the standard transformer with the inductor are optimized using the method illustrated in Fig. 15(d).The optimization is performed with the standard transformer occupying 12 cm 2 and the inductor occupying 8 cm 2 .The ratio between the transformer and inductor footprints is chosen to minimize the combined loss for the transformer and the inductor at full load.

V. EXPERIMENTAL RESULTS
The proposed magnetic integration concept is experimentally tested using a 3-kW 400-to-48-V HB LLC converter, as shown  in Fig. 17.GaN devices are used on both the primary and secondary sides.Table III lists the test parameters and prototype description.
Fig. 18 shows the steady-state operating waveforms of the LLC converter at half-load and full load.The waveforms include the primary gate voltage (blue), transformer secondary voltage V sec (red), primary drain-source voltage (green), resonant current (magenta), and magnetizing current (cyan).The designed module has 132-μF ceramic output caps, maintaining output voltage ripples to < 500 mVpk-pk, as demonstrated in Fig. 19(a).In case of a power outage, the converter is designed to step up the gain to support the rated output voltage for a holdup time of 20 ms at minimum V in of 320 V, as demonstrated in   Fig. 19(b).The ringing in the secondary voltage happens during the parallel resonance mode when the synchronous rectifiers (SRs) are turned OFF due to the resonance between the transformer leakage inductance and the SR output capacitance.Given the designed resonant tank parameters, the required initial soft startup frequency is 1.2 MHz to keep the primary current stress within 150% of the peak nominal resonant current [26].
The efficiency is tested with an automated efficiency test setup using power Analyzer YOKOGAWA PZ4000 and electronic load BK PRECISION 8620.The converter peak efficiency reaches 98.7%, and the full-load efficiency is 97.6%.Fig. 20 shows the efficiency at 48-, 50-, and 52-V output, which shows minimal variations in efficiency.Fig. 20 also shows the efficiency during the holdup with an input voltage of 320 V and an output voltage of 48 V, which shows an expected drop in efficiency as the converter works far away from its optimum operating point (below resonant frequency).The tested efficiency does not include the gate driving loss; however, the driving loss is insignificant (<0.6 W) for the primary and secondary GaN devices combined.The loss breakdown of the designed LLC converter is shown in Fig. 21.
Authorized licensed use limited to the terms of the applicable license agreement with IEEE.Restrictions apply.Fig. 22 shows the tested thermal performance under full load (60 A) after steady-state thermal is reached with 800-LFM air cooling and no heat sink.The hot spot is PCB winding at the termination point with the full-bridge rectifier of 92 • C. Adding a heat sink that covers the devices and the exposed winding will help to further the thermal performance [27].The EMI performance is tested and demonstrated in Fig. 23, comparing the proposed ITL with full-shield utilization (see Fig. 7) and the original ITL with a shield (see Fig. 2) to the ITL without a shield.The proposed concept shows 15 dB less CM noise compared to the no-shield ITL at the fundamental frequency, while the original ITL with a shield shows a 17-dB EMI reduction.With the proposed ITL with full-shield utilization, the EMI performance is degraded by only 2 dB while offering a 16% winding loss reduction compared to the original ITL with a shield.The proposed full-shield utilization method is preferred to get the efficiency and thermal benefits with a quantified and not-so-significant 2-dB EMI price.Furthermore, the entire converter width is 57 mm, which makes it fit within the 1U ORV3 form factor.The converter height is only 10 mm, with the core plate being the highest point at 4.2 mm.The low profile design gives more room for adding a heat sink and facilitating good airflow.With the 1.5-kW/in 3 dense converter, the potential power of the ORV3 PSU can be pushed to 9 kW, as shown in Fig. 24.The PSU can fit three 3-kW modules, which only consume 30% of the PSU footprint and 25% of the PSU profile.This work is compared in Fig. 25 to the state-of-the-art achievements in the regulated 400-to-48-V converters [3], [7], [18], [19], [20], [28], [29].The proposed 3-kW LLC converter shows superiority in efficiency and power density.

VI. CONCLUSION
In this article, we discussed the integration of a PCB-based transformer with a resonant inductor, which was achieved by unbalancing the turn ratio between two elemental transformers.We proposed a new method for PCB winding implementation that utilized the EMI shielding layers to create resonant inductance.This approach enabled the utilization of 100% of the PCB layers, including shielding layers, as windings.Moreover, the proposed method reduced winding loss compared to the state-of-the-art implementation and led to higher power density.To further enhance the design, we proposed an improved core structure for the ITL, which employed an EEI-core to achieve better flux distribution and reduced core loss.To validate the effectiveness of our proposed concepts, we implemented them in a 3-kW 400-to-48-V LLC converter.The resulting prototype achieved a peak efficiency of 98.7% and a power density of 1.5 kW/in 3 , showing superiority compared to the state-of-the-art implementations.

Manuscript received 13
March 2023; revised 31 May 2023; accepted 27 June 2023.Date of publication 27 July 2023; date of current version 19 January 2024.This work was supported by the Power Management Consortium in the Center for Power Electronics Systems (CPES), Virginia Tech.(Corresponding author: Qiang Li.)

Fig. 1 .
Fig. 1.Resonant HB LLC circuit with a matrix of two transformers and two full-bridge rectifiers.(a) Circuit diagram.(b) Magnetic integration of two transformers using six-layer PCB and UI-core [11].
ITL, and improved ITL in the next section to ensure the fairness of the comparison.The winding current density is inspected in Fig.4(b).The ITL suffers from increased current density and winding loss due to the high number of primary turns in T 1 .The flux distribution is inspected in Fig.4(c), showing 2-D and 3-D views of the cores.The ITL core considerably increases the maximum flux density compared with the standard transformer core due to the introduced leakage flux in the ITL core.The losses and the inductance of the standard transformer and the ITL are compared in TableIIat full load at the same winding width and core A e .The magnetizing inductances of the standard transformer and the ITL

Fig. 6 .
Fig. 6.Improvement in current density of T 1 winding from the original ITL (left) to the proposed ITL (right) with half-shield utilization.

Fig. 8 .
Fig. 8. Improvement in current density of T 2 winding from the proposed ITL with half-shield utilization (left) to the proposed ITL with full-shield utilization (right).

Fig. 9 .
Fig. 9. Improvement in winding loss with the proposed winding layout compared to the original ITL.

Fig. 10 .
Fig. 10.Proposed EEI-core for better flux distribution in the ITL.

Fig. 11 .
Fig. 11.Improvement in core loss from (a) the original EI-core with 11.8 W to (b) the proposed EEI-core with 5.2 W.

Fig. 12 .
Fig. 12. Sided air gap with (a) an asymmetric MMF distribution and (b) asymmetric current sharing simulated using the 2-D FEA Eddy solver.

Fig. 13 .
Fig. 13.Centered air gap with (a) a symmetric MMF distribution and (b) symmetric current sharing simulated using the 2-D FEA Eddy solver.

Fig. 14 .
Fig. 14.Avoiding the fringing loss.(a) Controlling the clearance between winding and air gap.(b) Winding loss versus the clearance from air gap.

Fig. 16 .Fig. 17 .
Fig. 16.Comparison between the proposed ITL and the standard transformer + inductor at the same footprint 20 cm 2 .

Fig. 23 .
Fig. 23.EMI performance of the original ITL with a shield [see Fig. 2(a)] and full-shield utilization [see Fig. 7(a)] compared to the original ITL with no shield.
Efficient Integrated Transformer-Inductor WithHigh PCB Utilization and Optimized Core Ahmed Nabih , Member, IEEE, Feng Jin , Student Member, IEEE, and Qiang Li , Member, IEEE

TABLE I CORE
MATERIAL DMR96A PARAMETERS

TABLE II COMPARISON
BETWEEN THE STANDARD TRANSFORMER AND THE ITL