data_synchronizator.pdf (618.5 kB)

Hardware design for data synchronization under high interference

preprint

posted on 2022-04-27, 04:32 authored by Dimitris NikolaidisDimitris Nikolaidis

Novel hardware design aimed at capturing data packets under high inteferance.

History

Email Address of Submitting Author

nikolaidisdimitris1994@gmail.com

Submitting Author's Institution

National Technical University of Athens

Submitting Author's Country

Greece

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Categories

Communication, Networking and Broadcast Technologies

Keywords

FPGA-based correlator Packet synchronization Networks High Interference

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