error_correction_version_2.pdf (317.68 kB)

Implementation of high throughput system for data correction

preprint

posted on 2022-07-19, 03:58 authored by Dimitris NikolaidisDimitris Nikolaidis

Novel error correction system implemented on FPGA.

History

Email Address of Submitting Author

nikolaidisdimitris1994@gmail.com

Submitting Author's Institution

National Technical University of Athens

Submitting Author's Country

Greece

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Categories

Communication, Networking and Broadcast Technologies

Keywords

Error correction FPGA Hardware implemntation

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