Investigation of β-Ga2O3-based HEMT for Low Noise Amplification and RF Application

Here we demonstrate a two-dimensional β-gallium oxide-based high electron mobility transistor (HEMT) comprising of a finite gap—access region gap (L_ARG ) in Ohmic-contact access regions with record transconductance linearity. Apart from limiting two-dimensional electron gas (2DEG) density n_s dependency on gate voltage, higher saturation current is estimated for the proposed design. Since the access regions length directly affects the Capacitance of the device and resultant switching applications. In this work, the effect of the gate-source and gate-drain length on device linearity is performed using Atlas-2D simulations. C-V characteristics of the proposed device are explained based on the physical explanation and validated using appropriate models. The higher values of transconductance g_m and current gain cut-off frequency f_T on a large span of operating voltages ensure improved transistor performance for low-noise amplification and RF application and are reported for the first time.


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Abstract-Here we demonstrate a two-dimensional βgallium oxide-based high electron mobility transistor (HEMT) comprising of a finite gap-access region gap ( ) in Ohmiccontact access regions with record transconductance linearity. Apart from limiting two-dimensional electron gas (2DEG) density dependency on gate voltage, higher saturation current is estimated for the proposed design. Since the access regions length directly affects the Capacitance of the device and resultant switching applications. In this work, the effect of the gate-source and gate-drain length on device linearity is performed using Atlas-2D simulations. − characteristics of the proposed device are explained based on the physical explanation and validated using appropriate models. The higher values of transconductance and current gain cut-off frequency on a large span of operating voltages ensure improved transistor performance for low-noise amplification and RF application and are reported for the first time.

I. INTRODUCTION
igh-electron-mobility-transistors have shown outperformance in terms of high-frequency and highvoltage operations. Higher two-dimensional-electron gas (2DEG) density ~ 10 12 -10 13 cm -3 and 2DEG mobility of 1200-1500 cm 2 V -1 s -1 make GaN-based HEMTs the preferable choice for high-frequency electronics applications. However currently, a relatively new semiconductor material galliumoxide (Ga2O3) is being explored at a fast pace for potential highpower and high-frequency electronics emerging applications. Out of its five phases, the β-phase is found to be the most stable and has some interesting properties like large bandgap g ~ 4.5-4.9 eV, critical electrical field C ~ 8-9 MV/cm, and availability of economical single crystal substrates grown using melt-based growth techniques [1]- [4] transconductance g , and current-gain cut-off frequency , after reaching their peak values, show a rapid fall with gate bias [8], [9]. This bias-dependent nonlinearity affects the noise performance of amplifiers and is attributed to the high resistivity of Ohmic-contact access regions. Several methods have been proposed so far to ease this effect using high-doping in the source-access region at the heterointerface [8], and multichannel structures [10], [11] and achieved good linearity by reducing access-region resistance. Earlier this was explained based on enhanced electron-phonon interactions in GaN HEMTs [9]. Lately, several three-dimensional (3D) structures are proposed comprising 3DEG [12], and lateral-gated 3D structures like junction field-effect transistors (JFETs) with lateral depletion [13]. Few of them have lower breakdown voltage while most have sophisticated designs.
Access region resistance has been identified as the main source of nonlinearity in high-electron-mobility transistors (HEMTs), and surface potential based analytical model and its temperature dependence for GaN based HEMT has been reported [14], and experimental analysis of source resistance in InGaAs/InAlAs HEMTs [15]. Furthermore, parasitic source resistance was measured based on varying gate bias and gate length of GaN based heterostructure FETs (HFETs) [16], and optimization of nonlinear access resistance in β-Ga2O3 based HEMTs has been reported [17]. These various methods envisaged to minimize dynamic access resistance broadly ranges from high-doping in the access region and threedimensional structure comprising three-dimensional electron gas (3DEG) and lateral depletion. However, the effects of a particular method proposed for reducing access resistance on the capacitances and resulting linearity of the device require more investigation.
In this paper, TCAD simulations have been performed, on a β-Ga2O3 HEMT with access-region-gaps, to quantify the effects of varying access-region lengths on thebehavior and linearity of the device. Thebehavior is validated by appropriate analytical models reported earlier. The Section II explains device structure and simulation outline followed by results and discussion in section III. The paper is concluded in Section IV.

II. DEVICE DESIGN AND SIMULATIONS FRAMEWORK
The schematic of the device under test is shown in Fig. 1 (a). The epitaxial layer sequence consists of 50-nm width β-Ga2O3 buffer layer on a semi-insulating β-Ga2O3 substrate, followed by 10-nm width AlN barrier layer. The buffer layer has a doping concentration of 10 16 cm -3 , while the barrier layer is undoped. The gate contact is Schottky type, while drain and source contacts are the Ohmic types with a contact resistance of 0.4 ohm-mm as given in [18]. The device has the gate-length of 0.1 µm, and equal gate-source and gate-drain length of 0.7 µm. The AlN barrier is contracted laterally to create a finite gap-access region gap of 0.05 µm. This is done to minimize charge depletion in the vicinity of barrier end and source/drain regions. The same can be done easily using more popular self-aligned technology, which is leveraged here for potential gain in device linearity. The schematic of conventional HEMT, used for comparing results, is also shown in Fig. 1 (b). The device width is set as 50 µm and all the reported quantities are normalized on this dimension. All simulations and numerical computations are performed using ATLAS 2D device commercial software [19], and MathWorks -MATLAB [20] respectively. For a drain bias up to 15 V, and a critical field of 1.54 kV/cm [21] the ratio ⁄ is equal to 1 µm. Therefore to keep the maximum electric field in access regions below EC, the overall lateral length of the device i. e. source-drain distance is kept at 1.5 µm. The β-Ga2O3 material parameters such as energy bandgap , conduction and valence-band density and , dielectric permittivity among others are taken from [4], [22]. The duo polarization models-spontaneous and piezoelectric are enabled for AlN material as provided in [19]. To capture the carrier velocity saturation effect in the β-Ga2O3 channel, a fielddependent mobility model is invoked among others like Shockley-Read-Hall (SRH) recombination, and Fermi Dirac statistics for carrier concentration. The user-defined parameters are given in Table 1, while the rest all for materials and models are used as default given in [19]. To capture the velocity saturation effect in velocity-field characteristics, a negative differential mobility model as given in [19] is used and default model parameters are replaced by values reported in [21]. Since in HEMT, 2DEG density has a profound effect on device operation and is a complex function of gate voltage. So it is vital to consider this bias-dependent behavior of 2DEG density in linearity analysis of the HEMTs. The explicit relation between and , as given in [23], can be written as follows: where, = ⁄ is the gate-capacitance, is the effective gate voltage, ℎ is the thermal voltage 0.0259 V at 300K. _ _ , _ _ are functions of _ is given as , where D is the density of states. The 2DEG density is numerically computed using MATLAB and plotted against for the proposed AlN/β-Ga2O3 HEMT as shown in Fig 2. It can be seen that 2DEG density rises vertically once > and gradually saturates for higher gate voltages. As increases, electron effective velocity decrease as ~1 √ ⁄ and subsequently a similar drop in values of g and fT can be expected due to quasi-saturation of electron velocity [8], [9]. This bias-dependent effect of on looks more evident in submicron devices as is kept short for optimum RF performance. To circumvent this variation in the channel ends near source/drain contacts, highly doped (Gaussian-type), finite access-area gaps have been introduced in the proposed design. This is validated based on the variation in carrier density versus for different using TCAD simulations and is shown in inset of Fig. 2. The results obtained are on the expected lines. The intensity of bias dependent behavior of with VGS significantly reduces and becomes constant beyond VGS = 2 V for all values of . Therefore, it can be concluded that in access regions, higher values of pointedly restricted percentage rise in carrier concentration with increasing gate voltages.
The − characteristics of the proposed as well as conventional HEMTs are shown in Fig. 3. Maximum drain current of 0.32 and 0.1 A/mm is found for the device with and conventional one respectively. Over 200 % rise in saturation current is observed for the proposed device. This is attributed to bias-independent high doping in source/drain access regions. Moreover, lower values of ON-resistance corresponding to the proposed device over conventional structure ensure lower net conduction losses. Furthermore, the lower knee voltage provides a large output voltage swing.

B. Effect of Access Region Length
As the access region length changes, the overall access resistance also changes. To evaluate the effect of the access region lengths on the linearity of the device, two different cases have been considered. In the first set of simulations, LGS decreases, and LGD increases in the step of 0.2 µm keeping the LSD constant, while in the second one, only LGS is decreased keeping LGD constant. The resultant effects on output current and gate-capacitances with varying gate voltage from -15 to 1 V are analyzed. A drain bias of 15 V is pre-applied to get the ID-VGS, and g − characteristics of the devices. The extracted values of gate-source and gate-drain capacitances and have been used for the physical explanation of the device linearity. From Fig. 4, it can be seen that access region length significantly affects the drain current and so the transconductance g .
As reduces, lower source-access resistance facilitates higher ID. Although at higher , the drain current starts to saturate. This can be attributed to increased drain-access resistance since keeps increasing. The electric field peak now occurs in the higher resistive drain-access region. This observation is in good agreement with the explanation given in [24]. The linearity of the devices is evaluated based on transconductance curves. A Figure of Merit (FOM)-gate voltage swing (GVS) defined as voltage range for which transconductance does not fall below 20 % of maximum value, is used to measure linearity [13]. For the proposed device, it is measured as greater than 12 V which is 100% higher than its respective value of 6 V for conventional HEMT. The maximum value of transconductance increases as LGS decreases, although GVS decreases due to the high resistivity drain-access region as explained earlier and found in good agreement with the phononmodel as explained in [9].
In the second case of analysis, reduces as explained earlier but now is fixed. The appropriate change in is obvious and is incorporated to fit these settings. The resultant effects on and g are shown in Fig. 5. Due to reduced sourceaccess resistance and constant drain-access resistance, here   drain current ID increases proportionally and negligible saturation at higher gate voltage. Consequently, almost flat curves of transconductance g m with GVS of 12 V are measured. These results and observations are endorsed by C-V characteristics of the proposed device and are given in the next subsection. The gate-source and gate-drain capacitances , and are further validated based on appropriate analytical models.

C. C -V Analysis
Since the access region length significantly affectscharacteristics of the device, small-signal capacitance-voltage analysis is done at a frequency of 1 MHz after applying a drainbias of 15 V. Gate capacitances and are extracted as a function of varying and are shown in Fig. 6 and Fig.7. As increases slightly above the cut-off voltage , values rise vertically and are attributed to the dependence of electron concentration in the channel on as explained in subsection A. It can be seen from Fig. 6 that for all beyond , increases monotonically with decreasing , and increasing and plateau is observed. Although a small increase in values are observed at higher , corresponding to = 1.1 and 1.3 µm, as shown in inset Fig.  6 a. This behavior can be explained on the physics-based compact models as given in [25], [26]. Since the 2DEG density is strong in this region, total gate-capacitance is equal to channel capacitance which is defined as ⁄ [25]. It is important to note that due to the doped β-Ga2O3 buffer layer ( = 10 16 cm -3 ), these doped charges are also added to . Now, = + , and deletion capacitance is defined as where is the built-in voltage and = 0 for , > , and is the doping profile dependent parameter [25]. Based on this model, it is obvious that as increases more depletion charges are added up to the at higher . On the contrary, there is no such divergence in the − characteristics for the second set of analyses is observed, where the is kept constant (Fig.   6 b).
Gate-drain capacitance versus gate voltage for varying access region length is shown in Fig. 7. From both the plots, it can be seen that increases with increasing , but the peak value decreases with reducing . This can be attributed to the rising values of values with increasing as explained previously based on the analytical model [25] and since total gate-capacitance = + . Furthermore, for the first case corresponding to = 1.1 and 1.3 µm, starts to decrease beyond -3V of , as shown in Fig. 7a. This can be attributed to poor control of the drain electrode as increases. It is validated by invoking the capacitance model [26], and simulations are performed to verify the dependence of on for various values of . The plots shown in Fig. 8 are in good agreement with related findings in [26].   LGS is changed, LGD is fixed. In both cases peak value of CGD decreases with LGS scaling, however for LGD = 1.1, 1.3 µm, CGD starts to decrease at higher VGS.

D. RF Performance
In order to evaluate the RF performance of the proposed device, a small-signal high-frequency analysis is performed based on the respective simulated transconductance curves. The cut-off frequency , and associated maximum oscillation frequency are extracted from the simulated current-gain ℎ 21 and unilateral power gain versus frequency characteristics. Fig. 9 shows the simulated values of cut-off frequencies versus gate-voltage. It can be seen that dependence on follows a similar trend as transconductance, but with limited linearity. The peak value of is found to be 170 GHz which gradually decreases with increasing . The fall in can be attributed to increasing gate-drain capacitance as shown in Fig. 7. The cut-off frequency is also calculated based on the following relation: Numerically computed values of using (3) are found to be slightly lower than the simulated values, nevertheless follows the similar trend with gate voltage.

IV. CONCLUSION
The inherent factors limiting the linearity performance of HEMTs are analyzed qualitatively. Simulation results of the proposed HEMT design, which incorporate measures to circumvent these issues, have shown excellent transconductance linearity and moderate cut-off frequency linearity as a function of increasing gate voltage. The effect of varying access region length on the − and g − characteristics are thoroughly investigated. These DC characteristics are explained based on capacitance-voltage measurements which are validated by appropriate physicsbased analytical models. Apart from inherent advantages like simpler design and negligible parasitic capacitances of the planar HEMT, the proposed design equipped with better linearity is expected to be useful in low-noise amplifiers and RF applications. Fig. 8. Effect of higher drain bias on CGD at fixed VGS. Gradual decrease of CGD with increasing VDS can be interpreted as steady loss of drain electrode control over channel charge. This is in-line with the capacitance model in [26].