Low-Power VDBA based Grounded and Floating Memristor Emulators

This work proposes a grounded and floating memristor using a voltage differencing buffered amplifier and one grounded MOS-Cap. The proposed memristor emulator can be utilized in both decremental and incremental configurations by slightly modifying the circuits. The proposed memristor emulators are simpler in design than most of the available memristor emulator designs in the literature. In this study, the pinched hysteresis loops are maintained up to a 5 MHz frequency. The proposed circuit includes essential features such as low power consumption, no passive component usage, and utilizes a limited number of transistors. The performance analysis of the proposed memristor emulator is ascertained with GPDK 45nm complementary metal-oxide-semiconductor process technology in the Cadence Virtuoso tool and indicates more promising performance than previously introduced emulators. Moreover, this work investigates the usage of memristive components in diverse application domains, such as binary-weighted digital to analog converters, bandpass filters, and associative learning. Further, post-layout simulations and their detailed comparison with earlier designs are carried out, representing the merits of the proposed memristors.