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Real-time Selective Harmonic Minimization using a Hybrid Analog Digital Computing Method.pdf (5.87 MB)
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Real-time Selective Harmonic Minimization using a Hybrid Analog/Digital Computing Method

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posted on 26.10.2021, 21:46 by Jason PoonJason Poon
We present a hybrid analog/digital computing circuit to solve a selective harmonic minimization problem. The approach leverages favorable attributes of digital and analog controllers to yield a fast and scalable optimization solver. A digital microcontroller programs the cost function and other user-defined inputs to the optimization. Voltages in the circuit represent switching angles in the optimization problem. In steady state, the voltages converge to Karush–Kuhn–Tucker (KKT) points of the problem. We present a specific realization of the computing circuit that solves for eight independent switching angles for a quarter-wave symmetric PWM driven two-level single-phase inverter. Seven undesired harmonics are minimized while retaining control over the modulation index. The proposed computing circuit is verified with simulations and a PCB hardware implementation. The experimental results demonstrate that the proposed circuit can converge to the optimal solution in less than 5.0 ms, which is substantially faster than existing methods and facilitates real-time implementation. Moreover, the steady-state power consumption of the PCB implementation is approximately 750 mW, which is also significantly lower than published methods for comparable applications. The computing circuit is utilized to generate the PWM for a 2 kW single-phase inverter, which validates its feasibility in practical applications.

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Email Address of Submitting Author

jason.poon@stanford.edu

ORCID of Submitting Author

0000-0001-6197-697X

Submitting Author's Institution

Stanford University

Submitting Author's Country

United States of America

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in IEEE Transactions on Power Electronics

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