Neuro_TVLSI_Major_resubmission.pdf (621.93 kB)
Download fileReliability-Aware Design of Spike-Event Neuromorphic Circuits
preprint
posted on 2021-08-12, 08:03 authored by Jani Babu ShaikJani Babu Shaik, Siona Menezes Picardo, Sonal Singhal, Nilesh GoelVery Large Scale Integration (VLSI) based
neuromorphic circuits also known as Silicon Neurons (SiNs) emulate the
electrophysiological behavior of biological neurons. With the advancement in
technology, neuromorphic systems also lead to various reliability issues and
hence making their study important. Bias Temperature Instability (BTI) and Hot
Carrier Injection (HCI) are the two major reliability issues present in VLSI
circuits. In this work, we have investigated the combined effect of BTI and HCI
on the two types of integrate-and-fire based SiNs namely (a) Axon-Hillock and
(b) Simplified Leaky integrate-and-fire circuits using their key performance
parameters. Novel reliability-aware AH and SLIF circuits are proposed to
mitigate the reliability issues. Proposed reliability-aware designs show
negligible deviation in performance parameters after aging. The time-zero
process variability analysis is also carried out for proposed reliability-aware
SiNs. The power consumption of existing and proposed reliability-aware neuron circuits
is analyzed and compared.