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Smaller, Faster, Lower-Power Analog RRAM Matrix Computing Circuits Without Performance Compromise

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posted on 2023-05-23, 15:22 authored by Yubiao Luo, Pushen Zuo, Shiqing Wang, Zhong SunZhong Sun, Ru Huang

Recently, the analog matrix computing (AMC) concept has been proposed for fast, efficient matrix operations, by configuring global feedback loops with crosspoint resistive memory arrays and operational amplifiers (OAs). The implementation of a general real-valued matrix (containing both positive and negative elements) is enabled by using a set of analog inverters, which, however, is considered inefficient regarding circuit compactness, power consumption, and temporal response. Here, with the assistance of the conductance compensation (CC) strategy to take full advantage of the inherent differential inputs of OAs, new AMC circuits without analog inverters are designed. Such a design saves the area occupation and power dissipation of analog inverters, and thus turns to be smaller and lower-power. Simulation results reveal that the new circuit also shows faster response towards the steady state, thanks to the reduction of poles in the circuit, which, again, is contributed by the elimination of analog inverters. Along with all of these benefits, extensive simulations demonstrate that the CC-AMC circuits do not compromise the computing performance in terms of relative error caused by various non-ideal factors in the circuit. The comparable performance of the two kinds of AMC circuits is also validated by addressing a typical matrix computing problem - the detection in multiple input multiple output (MIMO).


National Key R&D Program of China


111 Project


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Submitting Author's Institution

Peking University

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  • China