Synchronverters With Fast Current Loops

Virtual synchronous machines (VSMs) are inverters that behave toward the power-grid-like synchronous generators. Hence, they can be used as grid-forming inverters, and they can support the grid with inertia, droops, fault ride-through, and more. Synchronverters are a much studied type of VSMs. In this article, we present several improvements and innovations to the synchronverter control algorithm. We offer a complete design procedure for this algorithm. One change is meant to mitigate the fact that earlier designs are very sensitive to grid voltage measurement errors and processing delay, which may cause harmonic distortion and fluctuating amplitude of the grid-side currents. We propose to include a fast current controller as the internal control loop of the inverter. The design of this current controller involves delicate issues of compensating the delays and eliminating the dc components of the currents. The new design also enables a natural way for distortionless current limitation. We present a smooth start-up procedure. Our simulations and experiments show that the current controller leads to a dramatic reduction of the sensitivity of the VSM to measurement errors, processing delay, and grid voltage imbalance


I. INTRODUCTION
F OLLOWING [1], [2], and [3], inverters that behave toward the utility-grid like synchronous machines are called virtual synchronous machines (VSMs); see the recent survey [4]. One particular type of VSM is the synchronverter, introduced in [5]; see, for instance, [1], [6], [7], [8], [9], [10], [11], [12], [13], [14], and [15]. We propose here several improvements of the synchronverter algorithm, the main one being three current loops to regulate the grid current. This is needed to overcome the excessive sensitivity of synchronverters to grid voltage measurement errors due to sensor or analog-to-digital converter imperfections, and delays. These errors can be very disturbing, causing distortions of the grid currents and unsteady amplitude, especially when a synchronverter works at relatively low power. These problems have been analyzed in detail in our papers [16], [17]. The state-space model derived in [16] and [17] is essentially valid also for the new control algorithm presented here. While the need for current loops was demonstrated in [16], the design of these loops was not described there. Moreover, once we use current loops, the start-up procedure must change significantly (compared to, for instance, [14]), and we propose here a new start-up procedure. Another improvement of the synchronverter algorithm proposed here is the lead filtering of the droop signal, achieving a moderate droop constant at steady state (thus avoiding excessive power if the grid frequency deviates from its nominal value) and still achieving the same stable behavior as for a high droop constant.
This article gives a complete and detailed new synchronverter algorithm design, including the current loops, compensation of the processing and pulsewidth modulation (PWM) delays, lead filtered frequency droop, virtual capacitors against dc currents, start-up procedure and secondary control, and current and power limitations.
Synchronverters with current loops (on the grid side) have been used, e.g., in [9], [18], and [19], but a detailed design procedure for such current loops, specifically tailored for VSMs, is lacking, to the best of our knowledge. The paper [9] uses current loops and proposes how to create a multiterminal HVdc system using synchronverters and a novel control strategy called "active voltage feedback control," providing primary and secondary frequency support. The other two cited references deal with smaller scale systems and provide very good experimental results. The main reason given for current loops is to achieve grid current limitation. In addition, Roldan-Perez et al. [19] also cite the reduction of current harmonics and imbalances as a reason for using current loops. Our main justification for the current loops is to reduce the sensitivity to measurement errors, as explained in [16]. An important novelty in our approach is that we show how to integrate virtual capacitors in the current loop. In addition, we give the full design of the current loops and show that they may be regarded as an internal-model-based controller acting at two resonant frequencies (0 and 50 Hz).
Wu et al. [20] offer a different approach to increase the robustness of a VSM (they emphasize the robustness to double line frequency ripple). They propose to use a fast inner loop to regulate the voltage on the capacitor in the (LC or LCL) output filter of the inverter. The primary control of a VSM does not need communication with other VSM units. To achieve global controllability of a microgrid, secondary control is used, as explained in [21], using a centralized controller. We show how to integrate the secondary control with our synchronverter design.
Our conference paper [22] contains the main ideas of the sensitivity analysis published later in [16], and also a preliminary version of the current loops that we propose here, without experimental results. Since presenting the conference paper, we have significantly improved the design of the current loops, by adding virtual capacitors in the current loops and compensating the delays occurring in this fast control subsystem by correcting the angle in the Park transformation. Moreover, we have refined the start-up procedure of the current loops and have added a control loop for the zero component of the output currents. We show that these loops are based on the internal model principle, and we give the mathematical derivation of our delay compensation.
The rest of this article is organized as follows. In Section II, we describe the new synchronverter control algorithm, except for the current control loops, which are explained in Section III. Section IV focuses on the secondary control of frequency and voltage. The verification of the proposed control strategy using microgrid simulations is presented in Section V. Section VI presents experimental results. Finally, Section VII concludes this article.

II. NEW CONTROL ALGORITHM
A simplified representation of the ac power circuit of a synchronverter is shown in Fig. 1, which shows only one out of three identical phases. In the low frequency range, the signal g = [ g a g b g c ] is practically equal to the control signal g (the average of g over a switching period h = 1/f s is g). A more precise model is obtained if we take into account the processing delay introduced by running the algorithm on a microcontroller and by the PWM process. To take these delays into account, we use the approximation where h is the switching period, which is also the time allocated to one execution of the control algorithm on the microcontroller of the inverter. Then, the processing delay is h, while the delay introduced by the PWM process is about h/2 (see [23]), leading to the value τ = 1.5h. The main block diagram of a VSM working under the new synchronverter algorithm is shown in Fig. 2. Many parts are taken from [10] and [15]. The fast current control loops are represented by just one block, the details of which are given in Figs. 5-8 and will be explained further in this article. The motivation for our current loops is to employ a virtual impedance instead of the actual filter impedance (as was done in the original synchronverter algorithm from [15]). This virtual impedance consists of an inductor L g in series with a resistor R g and a capacitor C g , where L g and R g represent the equivalent stator impedance of a synchronous generator, while C g prevents dc components in the virtual currents. The value C g is large, so that at the grid frequency and at higher frequencies, its effect is negligible. The virtual current in phase a, denoted by i virt,a , and the charge in the corresponding capacitor C g , denoted by y a , satisfy the differential equations (2) and similarly for phases b and c. Here, v a is the voltage on phase a of the grid and e a is the synchronous internal voltage of the generator on phase a. The vector of virtual currents is . These currents (after Park transformation and limitation for safety) become the references for the current control loops; see Figs. 2 and 8. As explained in [16], we choose L g and R g about 50 times larger than L s and R s , so that the currents i virt are much less affected by voltage measurement errors than the currents in a classical synchronverter (as in [15]). Moreover, i virt is not affected at all by processing delays or the delays inherent in the PWM process. This choice of large L g and R g is also beneficial for stability, as explained in [24].
We denote by ω the angular frequency and by θ the virtual rotor angle of the inverter (so that ω =θ). We define sinθ = [sin θ sin(θ − (see [15], [16], and [24]), where i f is the rotor (or field) current, and m = 3/2M f , M f > 0, is the peak mutual inductance between the rotor winding and any one stator winding.
The electric torque of the VSM is generated using the virtual currents, according to the following formula: Here, i virt,d and i virt,q are the d and q components of the vector i virt after the unitary Park transformation. Applying the unitary Park transformation to (2), we get where e d = 0 and e q = −mi f ω. The instantaneous active power P and reactive power Q are given by the well-known formulas (see [10] and [16]) Authorized licensed use limited to the terms of the applicable license agreement with IEEE. Restrictions apply. Control block diagram of a VSM, using the virtual currents i virt to produce the electric torque T e , and also (after limitation) as references for the current control loops. Switch S 1 is in the upper position and switches S 2 and S 3 are open (as shown above) during the initial synchronization process (when the circuit breaker is OFF). During normal operation, these switches are in the opposite state. The output signal g from the controller goes to the PWM generator. The symbol S denotes a saturating integrator as in (12). The secondary control blocks are optional, and they are centralized, sending the signals δω and δV to each VSM in the (micro)grid. The current control block is described in Section III. Park and inverse Park transform blocks are not shown.
These are the powers flowing from the inverter legs (after R s ) toward the capacitors C s and the grid (see Fig. 1). The capacitors contribute a small addition to the powers flowing to the grid. If the grid voltage is of the ideal form v = 2/3V sinθ g (7) where θ g is the grid angle,θ g = ω g , and we denote δ = θ − θ g , called the power angle, then (see [10, eqs. (16) and (17)]) Here, V is the rms line-to-line voltage. Assuming that the line voltage V and frequency ω g are equal to their nominal values V r and ω n , the nominal active torque T m needed to achieve a desired active power P set and reactive power Q set at equilibrium is computed based on [16, formula (22)]: When the voltage and frequency deviate from the nominal values, then using this T m will no longer lead to the desired equilibrium values of P and Q, but T m from (8) still gives a reasonable approximation, and it will be used in the algorithm. The angular frequency follows the swing equation: where J > 0 is the inertia of the rotor, T e is the electric torque from (4), and T l is the limited active torque, which under normal conditions (when the saturation block in Fig. 3 is not saturated) is Here, T d is the droop torque, obtained from the frequency error through a lead filter Here, a hat denotes the Laplace transformation, and s is the complex variable. Here, τ d ≈ 1 s, D p > 0 is the frequency droop constant for low frequencies, α ≥ 1, and αD p is the frequency droop constant for high frequencies. At low frequencies, we want to have a smaller droop constant, so that a long lasting drop of ω g will not require the inverter to provide an excessive power P , which may deplete its energy source. The choice of J and D p is not discussed here; see instead [24]. In steady-state operation (i.e., at an equilibrium point of the overall dynamical model), T l ω is the power flowing to the grid plus the virtual power consumed in R g ; see [16, eq. (22)]. To protect the inverter from overload, it makes sense to limit T l . However, we only want to limit the steady-state value of T l , while allowing without limitation the fast transients that are important to maintain stability. To achieve this, we follow the approach from [7] to split the signal T m + T d into two complementary channels (one low-pass filtered and its complement) and apply the saturation only to the low-pass filtered signal, as shown in Fig. 3. Here, τ w ≈ 1 s. The field current i f evolves according to [10, eq. (15) In many places in the algorithm, we use a saturating integrator. Let u min and u max be real numbers with u min < u max . The saturating integrator with input w and output u, with output range [u min , u max ], is a dynamical system defined bẏ where Here, w + = max{w, 0} and w − = min{w, 0}. This is an integral controller with antiwindup; its output (which is also its state) is confined to [u min , u max ]. In Fig. 2, S denotes the saturating integrators. We can see many of them in Fig. 2, and detailed explanations about this type of controller are given in [25]. For each saturating integrator, the limit values u min and u max have to be chosen according to the normal operating range of the integrator. We mention that an alternative scheme for antiwindup in a VSM has been proposed in [26].

III. CURRENT CONTROL LOOPS
For nice surveys of current control strategies for inverters, see [27], [28], [29], and [30,Ch. 12]. Our algorithm is suitable for any inverter that receives slowly varying current reference signals in dq0 coordinates: a vector of voltages in a virtual circuit, as shown in Fig. 4. The controller will generate E aiming to minimize the vector of current tracking errors is the vector of output inductor currents. The current sensors may be placed to measure i or (to achieve lower switching noise) they may measure i grid . The control loops that we propose will work in both cases. We present the theory under the assumption that the vector of measurements is i, and we shall state in Remark 3.1 what needs to be changed if the measurements are i grid .
We introduce the complex signals These are time-varying phasors, as in [31].
Their Laplace transforms will be denoted by v and i. We use similar notation for all three-phase signals.
We denote by w = [w a w b w c ] the charges in the three virtual capacitors C virt as in Fig. 4, obtained by solving which corresponds to the circuit in Fig. 4. The resistor R virt is variable. Normally, its value is very high (like 1 kΩ), so that it is negligible. During start-up, when the electronic switches start working, R virt starts from 0 and is growing for about 3 s, after which it remains constant at the high value. This feature is effective in preventing excessive transient currents.
In the current controller design below, we neglect R virt (by setting it to infinity). We denote where U (θ) is the unitary Park transformation. It is well known (and easy to verify) that (with ω =θ) We are designing a current controller that acts on a fast time scale, of several milliseconds. On this time scale, the angular frequency ω will change very little, due to the (virtual) inertia. Thus, it will be very convenient for our analysis of the current control loops to regard ω as a constant. After applying the Laplace transformation to (14), assuming that ω is constant and neglecting initial conditions, we get The signal g, the output of the overall control algorithm, has been introduced at the beginning of Section II. Fig. 2 shows that g is the output of the current control loops. From the circuit in Fig. 4, with R virt = ∞, and similarly for phases b and c. Keep in mind that there is a delay τ from g to g, as expressed in (1). Recall the following simple property of the Park transformation: for any ϕ, ψ ∈ R, If we apply the Park transformation to g, assuming that ω is constant and denoting ϕ = ωτ , then from the above formula, we have From here, it follows that This reveals the effect of a time delay by τ on the corresponding time-varying phasors. We see that the phasor is delayed by the same amount, which has a small effect, because our phasors change slowly. In addition, the delay causes a multiplication by e −jϕ , which rotates the phasor g(t) clockwise by ϕ. Luckily, this effect is easy to correct, by multiplying the output of the controller with e jϕ . We shall see below [after (22)] how this is done.
Applying the Park transformation to the second part of (16), using (14) (with i in place of w), we get After applying the Laplace transformation, assuming again that ω is constant and neglecting initial conditions, we get that Notice that we have here a rational transfer function (plant) with nonreal coefficients, a rare occurrence in control. Denoting z = R s L s + jω and choosing a proportional-integral (PI) controller in order to eliminate the steady-state error for a constant reference i ref , we propose the block diagram in Fig. 5. The proposed control algorithm adds the signal v to the output of the PI controller, in order to cancel another signal − v entering the plant. However, this addition is corrupted by the voltage measurement  (21), a PI controller working in the dq domain, and an additional feedback loop introduced by the virtual capacitors C virt that work in the abc domain, but are shown here translated into the dq domain according to (15). η is the phasor of the voltage measurement errors. If the current sensors measure i grid , then also the signal i cap appears, so that i ref is compared with i grid . This option is shown in red and is explained in Remark 3.1. error η, represented by its time-varying phasor η. The diagram in Fig. 5 shows that g = E − w C virt , which is a direct consequence of (16).
In Fig. 5, the block with transfer function e −jϕ−sτ corresponds to (19). We see that the controller output E 0 is multiplied with a correction factor e jϕ whose role is to partially cancel out the effect of the factor e −jϕ from (19). This multiplication with e jϕ is performed in the inverse Park transformation applied to the signal E 0 (see Fig. 8) by using the angle θ + ϕ instead of θ. Indeed, this follows by inverting both sides of (17) and then applying them to E 0 .
By simple manipulations, the diagram in Fig. 5 can be reduced to the equivalent diagram in Fig. 6. In this reduction, we have assumed that v is slowly changing. Now, we can recognize from Fig. 6 that our current controller is an internal-model-based controller with two resonant frequencies: 0 and −ω, not symmetric with respect to the real axis. The poles of the controller correspond to the frequencies 0 and ω in the original abc coordinates (the pole at −jω corresponds to the frequency 0, while the pole at zero corresponds to the frequency ω). Note that the pole at jω adjusts itself automatically when ω changes.
There is a large literature on internal-model-based controllers with several resonant frequencies; see, for instance, [32] and [33]. In the specific context of three-phase current control, we refer to [34], which (unlike us) considers also harmonics and negative-sequence currents, with fixed resonant frequencies.
It remains to choose the controller parameters K p and K i . The following practical facts simplify the design. 1) We can choose C virt very large, so that the residue of the controller pole at −jω is very small; hence, it has an influence only in a very narrow frequency range around dc. Hence, at all other frequencies, we can ignore the term involving C virt . 2) Thanks to the correction e jϕ that we do at the controller output (see Fig. 5), the remaining delay in the control loop (seen in Fig. 6) has very little influence, because the time-varying phasors in Fig. 6 are slowly changing compared to the delay time τ . If, based on the above facts, we ignore the term involving C virt and also the delay, then the sensitivity S (the transfer function from the reference current i ref to ε) is There are many ways to choose the controller parameters K p and K i ; here, we outline one option. We choose ω b > ω n > 0 and we set K i = L s ω 2 b . Then, we choose a complex K p such that z + K p L s = 2ω b . Hence, assuming ω = ω n , Then, the transfer function from i ref to i is The bandwidth of G is ω b ; there is a double pole at −ω b and a complex zero approximately at −ω b /2. For fast current control, we choose ω b >> ω n . (For ω n ≈ 314 rad/s, we have worked with ω b = 1414 rad/s, which is still well below the angular switching frequency 2πf s of the inverter.) Until now, we have described a general-purpose three-phase current controller. Now, we make it more specific for our VSM application. We set i ref,d , i ref,q , and i ref,0 to be the signals obtained from i virt,d , i virt,q , and i virt,0 through saturation blocks, to achieve current limitation, as seen in Figs. 2 and 8.
According to Fig. 5 and (24), the components of E 0 are see the detailed block diagram in Fig. 8. The zero component of the grid current (the third component after the Park transformation), denoted by i 0 , must be controlled too (else it may become large and noisy). We propose another PI controller for this (see Fig. 7). From (13), neglecting again R virt , ε 0 = − d dt w 0 . From (1),g 0 = g 0 (t − τ ). The equation corresponding to (20) (25). Notice that the inverse Park transformation is performed with the angle θ + ϕ, to achieve a multiplication of E 0 by e jϕ , which to a large extent compensates the effect of the delay (due to processing and PWM).
We choose a controller like in (22), but with R 0 in place of K p . If [like in (23)] we ignore the term involving C virt and also the delay, then the sensitivityS (the transfer function from the reference current i 0,ref to ε 0 ) is In Fig. 8, we can see this controller. According to Fig. 7 As explained earlier, taking the inverse Park transform of with the corrected phase angle θ + ϕ, we obtain E in abc coordinates (see Fig. 8). According to (16), we get the controller output signals Authorized licensed use limited to the terms of the applicable license agreement with IEEE. Restrictions apply. whereθ = θ + ϕ, ϕ = ωτ . The values g a , g b , and g c are used to generate the PWM signals in the well-known manner. Remark 3.1: As promised, let us now consider the case when the current sensors measure i grid , but we use the exact same current controller, with the inputs i replaced with i grid . This means that in the block diagram of Fig. 5, the extra signal i cap (shown in red) appears, and hence, the error signal is ε = i ref − i grid . A similar change must be done in Figs. 6 and 7, not shown. i cap is an external signal to our current controller, as it depends only on v. In this case, i ref must be regarded as the reference current for i grid , and in Fig. 4, the current source i ref,a should be replaced with i ref,a + i cap,a . In Fig. 8, i d , i q , and i 0 should be replaced with i grid,d , i grid,q , and i grid,0 . All the other equations and figures remain unchanged.

IV. FREQUENCY AND VOLTAGE SECONDARY CONTROL
To achieve desired values for the frequency and voltages in an islanded microgrid, we use secondary control, as proposed in [21]. Secondary control slowly eliminates the voltage and frequency deviations caused by the local controllers (primary control), with respect to nominal values. A central controller receives ω j and V j (the frequency and local voltage amplitude of generating unit j) from all the generating units in the microgrid. According to [21], it computes the average of these inputs, ω avg and V avg . In the case of unequal inverters, a weighted average may be more appropriate. The deviations of ω avg and V avg from their corresponding nominal values ω n and V r are passed through slow PI controllers, obtaining the corrections δω and δV (see Fig. 2). Switches S 2 and S 3 are open when the microgrid is connected to a central grid. This simple secondary control works remarkably well as long as the total demand for active and reactive power in a microgrid does not exceed the limitations of the inverters (see Fig. 12).

V. SIMULATION RESULTS
The simulation model in Fig. 11 is a microgrid with three identical synchronverters and two loads connected via mainly inductive transmission lines. In our Simulink simulations, the control part of the inverters runs in discrete time with the sampling frequency of 10 kHz, and the power part is simulated at a step size corresponding to 100 kHz. We have used the ode4 (Runge-Kutta) solver with a fixed step size of 10 μs.
Following the guidelines from [24], the VSM model parameters are listed in Table I. The inverter is simulated using the average model of the switches. We have put delays of 50 μs on the outputs g a , g b , and g c of the controller, to represent the delay introduced by the PWM process. Thus, together with the processing, our total delay is τ = 150μs. The parameter m from (3) does not appear in Table I, because it is irrelevant: only the product mi f matters, and we may set m = 1.
In the design of the current controller, following the design outlined in Section III, we choose ω b = 1414 rad/s. We have z = (20 + 314.16j) s −1 . The resulting Nyquist plot of the current loop gain (the loop gain corresponding to Fig. 6) is shown in Fig. 9. This is an unusual nonsymmetric Nyquist plot, because  several coefficients in the loop gain are not real. The scale of this plot is too large to reveal the details around the origin, which are important for estimating the gain and phase margins. A zoomed plot is shown in Fig. 10. A MATLAB computation shows that the gain margin is ≈3.34, the phase margin is 46 • , and the crossover frequency is 2688 rad/s. The saturation limits for the saturating integrators giving ω and mi f have been chosen as follows: VSM-1 starts working at t = 0 s and behaves as a (pseudo) grid to the rest of the microgrid. Load-1 starts receiving the required power from this grid. VSM-2 starts synchronizing with the grid at t = 20 s. It connects to the grid and starts delivering power once synchronization has been achieved (about 4 s later). At t = 40 s, Load-2 is connected to the grid. VSM-3 starts to synchronize with the grid at t = 60 s and starts delivering power to the loads once synchronized.
We have simulated the effect of the voltage measurement noise by adding low-pass filtered independent discrete white noise signals to each of the nine voltage measurements in the microgrid of Fig. 11 (at the sampling frequency of 10 kHz). The bandwidth of each of the nine low-pass filters is 300 Hz, and the standard deviation of the filtered noise signal (the voltage measurement error) is 4 V. We have done all the simulations in two versions: with all the loads balanced (symmetric), as described in Fig. 11, and with Load-1 unbalanced. In the unbalanced case, the nominal powers absorbed by phases a, b, and c of Load-1 (at 230 V rms) are (active) 584, 460, and 584 W and (reactive) 160, 240, and 240 VAr.
We see in Fig. 12 that even with errors in the voltage measurements and with delays, the power and frequency signals are smooth and very close to the desired values except for short transients. We can also see in this figure that the frequency of the inverters is very close to 50 Hz most of the time, thanks to the secondary control. The influence of the load imbalance is very small. These results are much better than with the earlier algorithms in [5] and [10]. Comparisons to other current control algorithms are in our paper [35].

VI. EXPERIMENTAL RESULTS
We have built two three-level inverters (neutral point clamped) configured for 2-kW nominal power. The parameters are the same as in the simulations (see Table I).
The control algorithm (as described earlier) was run on an ST32H743 microcontroller that executes the program every 100μs. The power set points were P set = 1200 W and Q set = 0.
In the experiments described in this section, we have not activated the secondary control loops. The saturation limits for ω and mi f have remained as in (28).
We conducted two experiments to analyze the VSMs performance under a voltage and a frequency drop.

A. Variable Voltage
In this experiment, the VSM was connected to the grid via an autotransformer used to manually apply a voltage drop. At the beginning of the experiment, the inverter runs in steady state at normal grid voltage, meaning that the rms value of each phase of v is around 230 V. At around t = 0.1 s, the terminal voltages are reduced to around 160 V rms, the transition takes about 0.2 s. As a result, the grid currents i increase, and their rms values settle to new steady-state values (see Fig. 13). The following plots show the signals recorded by the microcontroller. Fig. 14 shows how the voltage drop causes an initial drop of mi f , followed by a rise, as the voltage droop is trying to counteract the voltage drop. The virtual currents i virt (d and q components) versus the actual grid currents i (d and q) are shown in Figs. 15 and 16. The plots show that indeed the current loops ensure very good tracking.

B. Variable Frequency
In this experiment, one inverter working as a VSM was connected to the second inverter, which was acting approximately as a voltage source (with the output impedance dictated by its output filter). Inductors of 10 mH were connected between the corresponding terminals of the two similar inverters. A balanced 3.6-kW load was connected to the inverter acting as a voltage source. With the voltage-source inverter working at nominal     grid frequency and voltage, our VSM was synchronized and connected. Once steady state has been reached, we have imposed a frequency drop with a nadir of about 1.27 Hz and a permanent drop of 0.4 Hz, with a profile similar to that occurring in a real grid after the loss of a power generation unit; see the last plot in Fig. 17. We see in Fig. 17 that after a transient with a strong inertial response of the VSM, the active power settles to a value that is slightly higher than before (due to the frequency droop), while the reactive power returns to its set value of zero. Faults such as the voltage and frequency drop shown above lead to a transient increase of the output currents. When i virt exceeds the safety limits of the inverter, the current limitation block (see Fig. 2, bottom right) limits i ref , protecting the inverter. We have tested this feature in a detailed Typhoon HIL simulation, with the same setup as used for Fig. 17.
Initially, the grid has nominal frequency and voltage, and the VSM is synchronized and has reached steady state with almost nominal active power. At t = 1 s, we impose a frequency drop similar in shape to that in Fig. 17 but with a 2.5× stronger dip, such that at the minimum, the grid frequency reaches about 294 rad/s. It can be seen in Fig. 18 that the active power increases and is limited to a maximum of 3 kW. After the transient, the active Fig. 17. Experiment testing the response of a synchronverter to a grid frequency dip shown in the third plot. The active power initially increases by 600 W. A moderate (permanent) active power increase of 70 W is seen at the end of the experiment, which is due to the 0.4-Hz lower final frequency. Fig. 18. After a frequency dip similar in shape to Fig. 17 but stronger, the active power increases but is limited at 3 kW. After the transient, the active and reactive powers settle approximately to P set = 2 kW and Q set = 0. power settles approximately to P set and the reactive power goes back to zero. Fig. 19 shows how i ref,d is limited to −5.5 A during this transient. After t ≈ 3.5 s, the limitation is no longer needed. During all this transient, the grid currents in a, b, c coordinates maintain their sinusoidal shape (not shown here for lack of space). Note in Fig. 19 that the actual grid currents (shown in d, q, 0 coordinates) track closely the reference currents during these transients.

VII. CONCLUSION
In this article, we gave a complete design procedure for the synchronverter control algorithm, including many innovative elements meant to improve the robustness of the synchronverter to the inevitable voltage and current measurement errors, to various transients and unbalanced grids. We gave the complete mathematical derivation of the novel elements. The new design was verified by simulations and experiments, which show that the proposed control algorithm leads to a very stable and reliable operation.