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This letter presents a comprehensive Step Voltage
Regulator (SVR) model suitable for the three-phase ZBUS power flow. The
model can be applied in all SVR configurations such as open delta, close delta,
wye. Its advantage is that the tap variations are simulated outside the YBUS
matrix, without compromising the convergence of the power flow. Therefore, a
refactorization of the YBUS matrix is not required after every tap
change reducing significantly the computation time of the power flow. The
proposed SVR model is validated in a 4-Bus network, while its performance is
tested in the IEEE 8500-Node test feeder.