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Design of a Novel CMOS Voltage Divider
  • Darshil Patel
Darshil Patel
Government Engineering College Gandhinagar

Corresponding Author:[email protected]

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Abstract

Passive linear voltage dividers are an essential part of the voltage sensing and detecting circuits. In this paper, a novel voltage divider is designed in 180nm CMOS technology and is validated with LTSpice simulations. The proposed circuit features very low steady current consumption and as a result, very little power dissipation around 200-300pW.