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Analytical Model and Planar Magnetics Based Solution for Parallelization Surges in Switched-Capacitor and Series/Parallel Multilevel Circuits
  • +2
  • Jinshui Zhang,
  • Boshuo Wang,
  • Xiaoyang Tian,
  • Angel Peterchev,
  • Stefan Goetz
Jinshui Zhang

Corresponding Author:[email protected]

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Boshuo Wang
Xiaoyang Tian
Angel Peterchev
Stefan Goetz
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Modular multilevel and cascaded converters are pivotal in various applications, including offshore wind, power transmission, large drives, or reconfigurable battery systems. Enabling parallel connectivity in these converters enhances their scalability and flexibility and introduces features such as switched-capacitor functionalities, hardware-safe sensorless voltage balancing, and reduced source impedance. While bringing the advantages of being more compact and more highly integrated electronics inherent to switched-capacitor circuits, parallelization can introduce challenges in balancing current surges under substantial voltage differences and/or very low inter-module impedance. Previous research has primarily examined the energy loss during this process, assuming that parallelization intervals significantly longer than the time required for energy exchange. However, in recent applications, particularly with fast-switching semiconductors, the oscillatory balancing dynamics between paralleling modules and the switching can interact. This study extends the characterization of paralleling dynamics and introduces a generalized analytical model. This model covers both scenarios where the switching and equilibration are independent or interacting. Additionally, we introduce a compact module interconnection with engineered inductance. The differential-mode inductance is tuned independently of the common mode to control the balancing current separately while contributing a negligible source impedance to the overall load. We validated our analytical model and tested the current surge control on an experimental prototype based on a cascaded double-H bridge circuit. The practical implementation of the module interconnection with engineered differential-mode inductance reduced the current surge by 86.5 % and the voltage overshoot by 42 %, consequently enhancing system efficiency by 2.2 %.
03 Feb 2024Submitted to TechRxiv
12 Feb 2024Published in TechRxiv