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Matching Critical Analog Circuit Components up to 3rd Order Gradients for All Possible Exact Matching Ratios
  • +5
  • Michael Sekyere,
  • Isaac Bruce,
  • Ruohan Yang,
  • Degang Chen,
  • Colin C Mcandrew,
  • Xiankun Jin,
  • Chen He,
  • Doug Garrity
Michael Sekyere
Iowa State University

Corresponding Author:[email protected]

Author Profile
Isaac Bruce
Iowa State University
Ruohan Yang
Iowa State University
Degang Chen
NXP Semiconductor, Iowa State University
Colin C Mcandrew
NXP Semiconductor
Xiankun Jin
NXP Semiconductor
Chen He
NXP Semiconductor
Doug Garrity
NXP Semiconductor

Abstract

This paper presents a systematic approach to generate layouts for two devices, with an arbitrary integer ratio of device sizes, that cancels up to at least 3 rd order gradient effects. A new analysis leads to mathematical constraints on 1dimensional layouts that meet the required integer ratio and cancel 2 nd-order gradients. From those layouts, we apply reflection and rotation symmetries to generate 2-dimensional layouts that cancel higher-order gradients. Importantly, our procedures can handle "dummy lanes" to ensure "routability". Furthermore, we discuss evaluation metrics that identify which of the multiple gradient canceling layout is best for any fixed rectangular grid and device application.
08 Feb 2024Submitted to TechRxiv
13 Feb 2024Published in TechRxiv