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Dual-Stripline Configuration for Efficient Routing in Chiplet Interconnects
  • +2
  • Shekar Geedimatla,
  • Jayaprakash Balachandran,
  • Midhun Vysakham,
  • Srinivas Venkataraman,
  • Shalabh Gupta
Shekar Geedimatla
, Department of Electrical Engineering, IIT Bombay

Corresponding Author:[email protected]

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Jayaprakash Balachandran
Department of Electrical Engineering, IIT Bombay
Midhun Vysakham
, Department of Electrical Engineering, IIT Bombay
Srinivas Venkataraman
Meta Inc, Department of Electrical Engineering, IIT Bombay
Shalabh Gupta
, Department of Electrical Engineering, IIT Bombay

Abstract

Routing density is becoming in big challenge in die-to-die interconnects. In this paper, we propose use of the dual-stripline configuration for routing signals in high-density interconnects. The scheme can improve the routing density by up to 33% when compared with the conventionally used stripline configuration. To address the challenges of crosstalk due to the proximity between vertically adjacent signal lines, halfpitch offset between lines on vertically adjacent layers has been proposed. The proposed routing scheme has been validated using 3D full-wave electromagnetic simulations. The simulations show that the scheme can be used for increasing the routing density in the Bunch-of-wires interface by 25%, while meeting all the Bunch-of-wires channel specifications, which include eye-opening value above 60% unit interval at a bit error rate of 10−15, with data rates of 16 Gbps per wire.
27 Feb 2024Submitted to TechRxiv
04 Mar 2024Published in TechRxiv