Abstract

In this paper, we develop a method for automatically selecting groups of loops to fuse in an image processing data flow graph, here referred to as a "fusing configuration". The method is designed for use on Digital Signal Processors (DSP), many of which rely on statically scheduled Very Long Instruction Word architecture. Selection is guided by a heuristic instruction scheduler that serves as a performance model for a candidate configuration. We show that for synthetically generated graphs of size 2 to 10 nodes, this approach is capable of selecting the optimal fusing configuration in 80% of graphs and selects a configuration that achieves within 10% of the performance of the optimal configuration for 90% of graphs.