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Low Complexity VLSI Architecture for OTFS Transceiver under Multipath Fading Channel
  • Ashish Ranjan Shadangi ,
  • suvra Das ,
  • Indrajit Chakrabarti
Ashish Ranjan Shadangi
Indian Institute of Technology

Corresponding Author:[email protected]

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suvra Das
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Indrajit Chakrabarti
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Abstract

Orthogonal Time Frequency Space (OTFS) modulation has established itself as a dependable  protocol for high-speed vehicular communication. This pioneering technique operates within a novel two-dimensional (2D) delay-Doppler domain waveform. When juxtaposed with conventional modulation methods like orthogonal frequency division multiplexing (OFDM), OTFS demonstrates superior performance enhancements in scenarios involving rapidly moving wireless channels. This paper begins by initially unveiling the input-output association of the OTFS signal within the delay-time domain. A comprehensive comparison with the established OFDM waveform highlights the potential of OTFS for achieving notably lower bit error rate (BER) under various conditions, which has been obtained by using the Minimum Mean Square Equalizer (MMSE) equalization technique. Finally, we have proposed novel and low complexity Very-large-scale integration (VLSI) architecture for the OTFS transmitter and the receiver by using the LU decomposition technique for the first time in state-of-the-art. We have shown comparison of computational complexity of both direct implementation and LU decomposition techniques, followed by resource utilization, timing analysis, and functionality testing of the proposed architecture.