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Design and Implementation of a CNTFET-Based Ternary Logic Processor
  • Sharvani Gadgil ,
  • Goli Naga Sandesh ,
  • chetan Kumar V
Sharvani Gadgil
BITS-Pilani

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Goli Naga Sandesh
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chetan Kumar V
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Abstract

This paper proposes the design and implementation of a CNTFET-based Ternary Logic processor. The processors' fundamental blocks like the instruction fetch, register file, data memory, and control unit designs are also presented. HSPICE simulation for the processor using a standard CNTFET model is performed and its functionality is verified using a few benchmark programs.