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CMOS-enabled Activation Functions for Low-power Hardware Neural Networks
  • Zhihao Chen ,
  • Amin Farjudian ,
  • James Greer
Zhihao Chen
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Amin Farjudian
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James Greer
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Abstract

A hardware neuron that can generate a broad class of activation functions is introduced. The requirements on the explicit form of activation functions within neural networks is not stringent. It is shown that the use of standard transistors can readily provide a variety of nonlinear transfer functions that can serve as activation functions. The similarities and differences of the hardware generated activation functions to commonly used mathematical activation functions are presented. A hardware neural network (HNN) based upon the neuron design is evaluated for pattern recognition. The accuracy and robustness of the HNN for the application is found to be comparable to its software counterpart even with moderate performance degradation due to perturbations to the inputs and component variability. This CMOS compatible neuron allows for HNN designs that are readily manufacturable leading to a practical, low-power platform for including HNNs into applications such as the Internet of Things (IoT) and systems-on-a- chip (SoC).