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Scalable Addressing Circuits for a Surface Code Silicon-based Quantum Computer
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  • Rubaya Absar ,
  • Zach D. Merino ,
  • Hazem Elgabra ,
  • Xuesong Chen ,
  • Jonathan Baugh ,
  • Lan Wei
Rubaya Absar
Institute for Quantum Computing (IQC)

Corresponding Author:[email protected]

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Zach D. Merino
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Hazem Elgabra
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Xuesong Chen
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Jonathan Baugh
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A scalable circuit is designed to provide control signals for local and global operation of surface quantum error correction codes through a modular design of tiered switches controlled by demultiplexers. Critical power, performance, and area (PPA) merits are reported through a TSMC 65 nm technology implementation. The proposed design is an important step toward the implementation of scalable solid-state quantum processors with integrated cryo-electronics.