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Design of High-Frequency, High-Power Class Φ2 Inverter Through On-Resistance and Output Capacitance Loss Reduction in 650 V Parallel eGaN Transistors for Optimal Thermal Performance
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  • Kamlesh Sawant ,
  • Yu Zhou ,
  • Keerti Palanisamy ,
  • Jungwon Choi
Kamlesh Sawant
University of Minnesota Twin Cities

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Keerti Palanisamy
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Jungwon Choi
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Abstract

This paper presents a class Φ2  inverters for high-power applications using multiple enhancement-mode gallium nitride (eGaN) switching devices operating at 13.56 MHz. The eGaN devices are beneficial in high-frequency, high-power applications such as plasma processing, thanks to the low switching and conduction losses. In addition, the small size of eGaN devices increases power density while reducing the impact of parasitic package components. However, their small package size makes it challenging to manage power dissipation, particularly at higher frequencies where additional conduction losses due to dynamic RDS(on) and switching losses due to COSS can significantly increase power dissipation. To address these challenges, we investigate the individual contributions of dynamic RDS(on) and COSS to power losses at high frequencies by paralleling multiple devices. We also propose criteria for selecting the optimum number of parallel eGaN devices to decrease power dissipation per device by reducing conduction losses greater than the addition in COSS losses. This approach helps to alleviate thermal stress in the devices. Finally, we demonstrate the effectiveness of our approach by designing a 1 kW single inverter and a 2 kW push-pull inverter at 13.56 MHz, which achieve over 90% drain efficiency while reducing thermal stress in the device.