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Sizing and short-circuit capability of a transformerless HVDC DC-DC converter
  • +2
  • R Vidal-Albalate,
  • D Soto-Sanchez,
  • E Belenguer,
  • R Peña,
  • Ramon Blasco-Gimenez
R Vidal-Albalate
Universitat Jaume I de Castelló
D Soto-Sanchez
Universidad de Magallanes
E Belenguer
Universitat Jaume I de Castelló
R Peña
Universidad de Concepción
Ramon Blasco-Gimenez
Polytechnic University of Valencia

Corresponding Author:[email protected]

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Abstract

This work aims at optimizing the converter design of the double-T MMC DC-DC converter in terms of transmitted power per submodule and also in terms of transmitted power per silicon area, while, at the same time, providing the capability to block dc faults. Firstly, the converter operation is described and the optimal values of the inner ac and dc voltages that minimize device power rating are derived. Next, the submodule topology is analyzed and a thorough study on the converter capability for blocking fault currents is carried out, showing that the converter is able to isolate dc faults both at the input and at the output of the converter. Finally, the previous analytical study is verified by means of detailed PSCAD simulations.
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The final version of record is available at http://dx.doi.org/10.1109/TPWRD.2020.2966751
10 Feb 2024Submitted to TechRxiv
14 Feb 2024Published in TechRxiv