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Unveiling Conductance States in ReRAM Cells through Analysis of Ultra-Fast Pulse Sequences
  • +3
  • Faisal Munir,
  • Daniel Schön,
  • Stephan Menzel,
  • Pascal Stasner,
  • Rainer Waser,
  • Stefan Wiefels
Faisal Munir

Corresponding Author:[email protected]

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Daniel Schön
Stephan Menzel
Pascal Stasner
Rainer Waser
Stefan Wiefels

Abstract

Neuromorphic computing, inspired by the processing capabilities of the brain, aims to overcome the limitations of conventional computing architectures. Valence change memory (VCM), along with other emerging resistive random access memory (ReRAM) devices, is a promising candidate for this endeavor due to its features, including fast write times. Moreover, VCM devices are also suitable for neuromorphic applications such as long-term potentiation (LTP), short-term potentiation (STP), and gradual switching. However, evaluating these schemes on a timescale down to sub-100 ps is challenging. This is because the capacitive current dominates the device current on shorter time scales. Therefore, new methods are required to analyze the response of device current to the application of short voltage pulses with short delays. To address the challenge of dominating capacitive current, this study proposes two methods: the integration method and the reference method. The integration method integrates the current and eliminates capacitive charges across a full charge/discharge cycle, proving to be more reliable for longer pulses and delays exceeding 200 ps. On the other hand, the reference method determines the device current by subtracting the capacitive current from the measured current, using a reference measurement. This method is particularly adept at analyzing shorter pulses and delays below 200 ps. Both methods offer distinct advantages in solving the capacitive current challenge in evaluating VCM devices for neuromorphic applications. This research contributes to a better understanding of the behavior of ReRAM cells under ultra-short pulses and delays.
15 May 2024Submitted to TechRxiv
20 May 2024Published in TechRxiv