In the realm of Internet of Things (IoT) security, the Physical Unclonable Function (PUF) emerges as a viable solution for generating individualized secure keys. These keys play a vital role in authentication, chip protection, and supply chain security, serving as crucial safeguards for resource-constrained IoT devices. This work introduces Boosted Configurable Ring Oscillator PUF (BC-PUF), an area-efficient variant of CROPUF that suits resource-constrained IoT devices. Additionally, BC-PUF employs an absorbent approach for the intermediate responses to optimize the utilization of CMOS delay configurations. Moreover, BC-PUF mitigates the risk of Machine Learning (ML)-based modeling attacks. BC-PUF is a multi-bit response architecture that has been developed, analyzed, and evaluated across 50 FPGAs, from each dataset of 10K Challenge-Response Pairs (CRPs) is extracted. Experimental results report average values of 50.2%, 40.4%, 42%, 3.925%, and 83% for uniformity, diffuseness, uniqueness, reliability, and Shannon entropy, respectively. In comparison to state-of-the-art designs, the BC-PUF design achieves area reductions ranging from 15% to 96.7% across various architectures and implementations, along with a power reduction of 9.7%. Moreover, BC-PUF demonstrates resilience against ML-based attacks, achieving a prediction accuracy of 51%.

Physically unclonable functions (PUFs) are circuit primitives that offer a promising and cost-effective solution for various security applications, such as integrated circuits (IC) counterfeiting, secret key generation, and lightweight authentication. PUFs leverage semiconducting variations of ICs to extract intrinsic responses based on applied challenges, establishing unique challenge-response pairs (CRPs) for each device. The security analysis of PUFs is crucial to identify the device weaknesses and ensure response integrity. Accordingly, CRP-based examination plays a major role in defining the resistivity of the block against general and modeling-based attacks. Such analysis requires an updated and representative dataset for training and evaluation. However, there is a lack of benchmark datasets for assessing the effectiveness and resistance of PUF devices. Motivated by this, in this work, we generate a dataset of 300K CRPs for a digital-based PUF implemented on a field programmable gate array (FPGA). The dataset provides a significant number of CRPs for a multi-bit response, where the spatial and temporal adjacency are implicitly defined in the extracted CRPs. Moreover, we investigate different approaches utilizing the generated dataset such as machine learning-based modeling, correlation analysis, and entropy analysis. The CRPs are employed to train linear and nonlinear Support Vector Machine (SVM) models, and the prediction accuracy of SVM models is used as an indicator of the PUF's vulnerability to modeling attacks. As the prediction accuracy does not exceed 65% over 10K CRPs, the extracted dataset sufficiently verifies the resiliency of the device against ML-based modeling attacks. Additionally, Pearson's coefficient is computed on a 10 K-bit vector to determine the correlation between the bits of the response. The calculations expose some correlations between ±0.25, which warns from potential threads. Finally, the paper discusses some potential future research directions and challenges that are envisioned to enhance the security performance of PUFs.

Physically Unclonable Function (PUF) is an emerging hardware security primitive that provides a promising solution for lightweight security. PUFs can be used to generate a secret key that depends on the random manufacturing process variation of the device for lightweight authentication and device identification. This work proposes an optimized version of the Configurable Ring Oscillator (CRO) PUF that aims to reduce power consumption and area overhead. The proposed design eliminates the duplication of ROs, reduces the switching activity, and introduces the inter-stage delay as an additional source of randomness. The proposed PUF has been implemented in 22nm FDSOI technology using the Synopsys tools. A comprehensive security analysis has been acquired utilizing Challenge-Response Pairs collected from 8 chips. Results show an average of 49.42%, 38.25%, 9.95%, and 45.5% for uniformity, diffuseness, reliability, and uniqueness, respectively. Compared with the state-of-the-art, the proposed design achieves an area and power reduction of 75% and 65.1%, respectively. With the proposed PUF delivering 10 32 CRPs, it is classified as a strong PUF. Additionally, the proposed design passes NIST tests and achieves an average prediction accuracy of 67.1% of machine learning modeling.

Physical layer security (PLS) can be adopted for efficient key sharing in secured wireless systems. The random nature of the wireless channel and channel reciprocity (CR) are the main pillars for realizing PLS techniques. However, for applications that involve air-to-air (A2A) transmission, such as unmanned aerial vehicle (UAV) applications, the channel does not generally have sufficient randomness to enable reliable key generation. Therefore, this work proposes a novel system design to mitigate the channel randomness constraint and enable high-rate secret key generation (SKG) process. The proposed system integrates physically unclonable functions (PUFs) and CR principle to securely exchange secret keys between two nodes. Moreover, an adaptive and controllable artificial fading (AF) level with interleaving is used to mitigate the impact of low randomness variations in the wireless channel. The proposed system can operate efficiently even when the channel is nearly flat or time invariant. Consequently, the time required for generating and sharing a key is significantly shorter than conventional techniques. We also propose a novel bit extraction scheme that reduces the number of overhead bits required to share the intermediate keys. The obtained Monte Carlo simulation results show that a key agreement can be reached at the first trial for moderate and high signal-to-noise ratios (SNRs), which is substantially faster than other PLS techniques. Moreover, the results show that inducing AF into static channels reduces the mismatch ratio between the generated secret sequences and degrades the eavesdropper’s capability to predict the secret keys.